jspc29.x-matter.uni-frankfurt.de Git - mvd_firmware.git/blob

   1 ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************\r
   2 ;* File Name          : startup_stm32f10x_hd_vl.s\r
   3 ;* Author             : MCD Application Team\r
   4 ;* Version            : V3.5.0\r
   5 ;* Date               : 11-March-2011\r
   6 ;* Description        : STM32F10x High Density Value Line Devices vector table \r
   7 ;*                      for EWARM toolchain.\r
   8 ;*                      This module performs:\r
   9 ;*                      - Set the initial SP\r
  10 ;*                      - Configure the clock system and the external SRAM \r
  11 ;*                        mounted on STM32100E-EVAL board to be used as data \r
  12 ;*                        memory (optional, to be enabled by user)\r
  13 ;*                      - Set the initial PC == __iar_program_start,\r
  14 ;*                      - Set the vector table entries with the exceptions ISR \r
  15 ;*                        address.\r
  16 ;*                      After Reset the Cortex-M3 processor is in Thread mode,\r
  17 ;*                      priority is Privileged, and the Stack is set to Main.\r
  18 ;********************************************************************************\r
  19 ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
  20 ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.\r
  21 ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,\r
  22 ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE\r
  23 ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING\r
  24 ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
  25 ;*******************************************************************************\r
  26 ;\r
  27 ;\r
  28 ; The modules in this file are included in the libraries, and may be replaced\r
  29 ; by any user-defined modules that define the PUBLIC symbol _program_start or\r
  30 ; a user defined start symbol.\r
  31 ; To override the cstartup defined in the library, simply add your modified\r
  32 ; version to the workbench project.\r
  33 ;\r
  34 ; The vector table is normally located at address 0.\r
  35 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.\r
  36 ; The name "__vector_table" has special meaning for C-SPY:\r
  37 ; it is where the SP start value is found, and the NVIC vector\r
  38 ; table register (VTOR) is initialized to this address if != 0.\r
  39 ;\r
  40 ; Cortex-M version\r
  41 ;\r
  42 \r
  43         MODULE  ?cstartup\r
  44 \r
  45         ;; Forward declaration of sections.\r
  46         SECTION CSTACK:DATA:NOROOT(3)\r
  47 \r
  48         SECTION .intvec:CODE:NOROOT(2)\r
  49 \r
  50         EXTERN  __iar_program_start\r
  51         EXTERN  SystemInit        \r
  52         PUBLIC  __vector_table\r
  53 \r
  54         DATA\r
  55 __vector_table\r
  56         DCD     sfe(CSTACK)\r
  57         DCD     Reset_Handler             ; Reset Handler\r
  58         DCD     NMI_Handler               ; NMI Handler\r
  59         DCD     HardFault_Handler         ; Hard Fault Handler\r
  60         DCD     MemManage_Handler         ; MPU Fault Handler\r
  61         DCD     BusFault_Handler          ; Bus Fault Handler\r
  62         DCD     UsageFault_Handler        ; Usage Fault Handler\r
  63         DCD     0                         ; Reserved\r
  64         DCD     0                         ; Reserved\r
  65         DCD     0                         ; Reserved\r
  66         DCD     0                         ; Reserved\r
  67         DCD     SVC_Handler               ; SVCall Handler\r
  68         DCD     DebugMon_Handler          ; Debug Monitor Handler\r
  69         DCD     0                         ; Reserved\r
  70         DCD     PendSV_Handler            ; PendSV Handler\r
  71         DCD     SysTick_Handler           ; SysTick Handler\r
  72 \r
  73          ; External Interrupts\r
  74         DCD     WWDG_IRQHandler               ; Window Watchdog\r
  75         DCD     PVD_IRQHandler                ; PVD through EXTI Line detect\r
  76         DCD     TAMPER_IRQHandler             ; Tamper\r
  77         DCD     RTC_IRQHandler                ; RTC\r
  78         DCD     FLASH_IRQHandler              ; Flash\r
  79         DCD     RCC_IRQHandler                ; RCC\r
  80         DCD     EXTI0_IRQHandler              ; EXTI Line 0\r
  81         DCD     EXTI1_IRQHandler              ; EXTI Line 1\r
  82         DCD     EXTI2_IRQHandler              ; EXTI Line 2\r
  83         DCD     EXTI3_IRQHandler              ; EXTI Line 3\r
  84         DCD     EXTI4_IRQHandler              ; EXTI Line 4\r
  85         DCD     DMA1_Channel1_IRQHandler      ; DMA1 Channel 1\r
  86         DCD     DMA1_Channel2_IRQHandler      ; DMA1 Channel 2\r
  87         DCD     DMA1_Channel3_IRQHandler      ; DMA1 Channel 3\r
  88         DCD     DMA1_Channel4_IRQHandler      ; DMA1 Channel 4\r
  89         DCD     DMA1_Channel5_IRQHandler      ; DMA1 Channel 5\r
  90         DCD     DMA1_Channel6_IRQHandler      ; DMA1 Channel 6\r
  91         DCD     DMA1_Channel7_IRQHandler      ; DMA1 Channel 7\r
  92         DCD     ADC1_IRQHandler               ; ADC1\r
  93         DCD     0                             ; Reserved\r
  94         DCD     0                             ; Reserved\r
  95         DCD     0                             ; Reserved\r
  96         DCD     0                             ; Reserved\r
  97         DCD     EXTI9_5_IRQHandler            ; EXTI Line 9..5\r
  98         DCD     TIM1_BRK_TIM15_IRQHandler     ; TIM1 Break and TIM15\r
  99         DCD     TIM1_UP_TIM16_IRQHandler      ; TIM1 Update and TIM16\r
 100         DCD     TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17\r
 101         DCD     TIM1_CC_IRQHandler            ; TIM1 Capture Compare\r
 102         DCD     TIM2_IRQHandler               ; TIM2\r
 103         DCD     TIM3_IRQHandler               ; TIM3\r
 104         DCD     TIM4_IRQHandler               ; TIM4\r
 105         DCD     I2C1_EV_IRQHandler            ; I2C1 Event\r
 106         DCD     I2C1_ER_IRQHandler            ; I2C1 Error\r
 107         DCD     I2C2_EV_IRQHandler            ; I2C2 Event\r
 108         DCD     I2C2_ER_IRQHandler            ; I2C2 Error\r
 109         DCD     SPI1_IRQHandler               ; SPI1\r
 110         DCD     SPI2_IRQHandler               ; SPI2\r
 111         DCD     USART1_IRQHandler             ; USART1\r
 112         DCD     USART2_IRQHandler             ; USART2\r
 113         DCD     USART3_IRQHandler             ; USART3\r
 114         DCD     EXTI15_10_IRQHandler          ; EXTI Line 15..10\r
 115         DCD     RTCAlarm_IRQHandler           ; RTC Alarm through EXTI Line\r
 116         DCD     CEC_IRQHandler                ; HDMI-CEC\r
 117         DCD     TIM12_IRQHandler              ; TIM12\r
 118         DCD     TIM13_IRQHandler              ; TIM13\r
 119         DCD     TIM14_IRQHandler              ; TIM14\r
 120         DCD     0                             ; Reserved\r
 121         DCD     0                             ; Reserved\r
 122         DCD     0                             ; Reserved\r
 123         DCD     0                             ; Reserved\r
 124         DCD     TIM5_IRQHandler               ; TIM5\r
 125         DCD     SPI3_IRQHandler               ; SPI3\r
 126         DCD     UART4_IRQHandler              ; UART4\r
 127         DCD     UART5_IRQHandler              ; UART5                       \r
 128         DCD     TIM6_DAC_IRQHandler           ; TIM6 and DAC underrun\r
 129         DCD     TIM7_IRQHandler               ; TIM7     \r
 130         DCD     DMA2_Channel1_IRQHandler      ; DMA2 Channel1\r
 131         DCD     DMA2_Channel2_IRQHandler      ; DMA2 Channel2\r
 132         DCD     DMA2_Channel3_IRQHandler      ; DMA2 Channel3\r
 133         DCD     DMA2_Channel4_5_IRQHandler    ; DMA2 Channel4 & Channel5                   \r
 134         DCD     DMA2_Channel5_IRQHandler      ; DMA2 Channel5\r
 135 \r
 136 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
 137 ;;\r
 138 ;; Default interrupt handlers.\r
 139 ;;\r
 140         THUMB\r
 141 \r
 142         PUBWEAK Reset_Handler\r
 143         SECTION .text:CODE:REORDER(2)\r
 144 Reset_Handler\r
 145         LDR     R0, =SystemInit\r
 146         BLX     R0\r
 147         LDR     R0, =__iar_program_start\r
 148         BX      R0\r
 149         \r
 150         PUBWEAK NMI_Handler\r
 151         SECTION .text:CODE:REORDER(1)\r
 152 NMI_Handler\r
 153         B NMI_Handler\r
 154 \r
 155         PUBWEAK HardFault_Handler\r
 156         SECTION .text:CODE:REORDER(1)\r
 157 HardFault_Handler\r
 158         B HardFault_Handler\r
 159 \r
 160         PUBWEAK MemManage_Handler\r
 161         SECTION .text:CODE:REORDER(1)\r
 162 MemManage_Handler\r
 163         B MemManage_Handler\r
 164 \r
 165         PUBWEAK BusFault_Handler\r
 166         SECTION .text:CODE:REORDER(1)\r
 167 BusFault_Handler\r
 168         B BusFault_Handler\r
 169 \r
 170         PUBWEAK UsageFault_Handler\r
 171         SECTION .text:CODE:REORDER(1)\r
 172 UsageFault_Handler\r
 173         B UsageFault_Handler\r
 174 \r
 175         PUBWEAK SVC_Handler\r
 176         SECTION .text:CODE:REORDER(1)\r
 177 SVC_Handler\r
 178         B SVC_Handler\r
 179 \r
 180         PUBWEAK DebugMon_Handler\r
 181         SECTION .text:CODE:REORDER(1)\r
 182 DebugMon_Handler\r
 183         B DebugMon_Handler\r
 184 \r
 185         PUBWEAK PendSV_Handler\r
 186         SECTION .text:CODE:REORDER(1)\r
 187 PendSV_Handler\r
 188         B PendSV_Handler\r
 189 \r
 190         PUBWEAK SysTick_Handler\r
 191         SECTION .text:CODE:REORDER(1)\r
 192 SysTick_Handler\r
 193         B SysTick_Handler\r
 194 \r
 195         PUBWEAK WWDG_IRQHandler\r
 196         SECTION .text:CODE:REORDER(1)\r
 197 WWDG_IRQHandler\r
 198         B WWDG_IRQHandler\r
 199 \r
 200         PUBWEAK PVD_IRQHandler\r
 201         SECTION .text:CODE:REORDER(1)\r
 202 PVD_IRQHandler\r
 203         B PVD_IRQHandler\r
 204 \r
 205         PUBWEAK TAMPER_IRQHandler\r
 206         SECTION .text:CODE:REORDER(1)\r
 207 TAMPER_IRQHandler\r
 208         B TAMPER_IRQHandler\r
 209 \r
 210         PUBWEAK RTC_IRQHandler\r
 211         SECTION .text:CODE:REORDER(1)\r
 212 RTC_IRQHandler\r
 213         B RTC_IRQHandler\r
 214 \r
 215         PUBWEAK FLASH_IRQHandler\r
 216         SECTION .text:CODE:REORDER(1)\r
 217 FLASH_IRQHandler\r
 218         B FLASH_IRQHandler\r
 219 \r
 220         PUBWEAK RCC_IRQHandler\r
 221         SECTION .text:CODE:REORDER(1)\r
 222 RCC_IRQHandler\r
 223         B RCC_IRQHandler\r
 224 \r
 225         PUBWEAK EXTI0_IRQHandler\r
 226         SECTION .text:CODE:REORDER(1)\r
 227 EXTI0_IRQHandler\r
 228         B EXTI0_IRQHandler\r
 229 \r
 230         PUBWEAK EXTI1_IRQHandler\r
 231         SECTION .text:CODE:REORDER(1)\r
 232 EXTI1_IRQHandler\r
 233         B EXTI1_IRQHandler\r
 234 \r
 235         PUBWEAK EXTI2_IRQHandler\r
 236         SECTION .text:CODE:REORDER(1)\r
 237 EXTI2_IRQHandler\r
 238         B EXTI2_IRQHandler\r
 239 \r
 240         PUBWEAK EXTI3_IRQHandler\r
 241         SECTION .text:CODE:REORDER(1)\r
 242 EXTI3_IRQHandler\r
 243         B EXTI3_IRQHandler\r
 244 \r
 245         PUBWEAK EXTI4_IRQHandler\r
 246         SECTION .text:CODE:REORDER(1)\r
 247 EXTI4_IRQHandler\r
 248         B EXTI4_IRQHandler\r
 249 \r
 250         PUBWEAK DMA1_Channel1_IRQHandler\r
 251         SECTION .text:CODE:REORDER(1)\r
 252 DMA1_Channel1_IRQHandler\r
 253         B DMA1_Channel1_IRQHandler\r
 254 \r
 255         PUBWEAK DMA1_Channel2_IRQHandler\r
 256         SECTION .text:CODE:REORDER(1)\r
 257 DMA1_Channel2_IRQHandler\r
 258         B DMA1_Channel2_IRQHandler\r
 259 \r
 260         PUBWEAK DMA1_Channel3_IRQHandler\r
 261         SECTION .text:CODE:REORDER(1)\r
 262 DMA1_Channel3_IRQHandler\r
 263         B DMA1_Channel3_IRQHandler\r
 264 \r
 265         PUBWEAK DMA1_Channel4_IRQHandler\r
 266         SECTION .text:CODE:REORDER(1)\r
 267 DMA1_Channel4_IRQHandler\r
 268         B DMA1_Channel4_IRQHandler\r
 269 \r
 270         PUBWEAK DMA1_Channel5_IRQHandler\r
 271         SECTION .text:CODE:REORDER(1)\r
 272 DMA1_Channel5_IRQHandler\r
 273         B DMA1_Channel5_IRQHandler\r
 274 \r
 275         PUBWEAK DMA1_Channel6_IRQHandler\r
 276         SECTION .text:CODE:REORDER(1)\r
 277 DMA1_Channel6_IRQHandler\r
 278         B DMA1_Channel6_IRQHandler\r
 279 \r
 280         PUBWEAK DMA1_Channel7_IRQHandler\r
 281         SECTION .text:CODE:REORDER(1)\r
 282 DMA1_Channel7_IRQHandler\r
 283         B DMA1_Channel7_IRQHandler\r
 284 \r
 285         PUBWEAK ADC1_IRQHandler\r
 286         SECTION .text:CODE:REORDER(1)\r
 287 ADC1_IRQHandler\r
 288         B ADC1_IRQHandler\r
 289 \r
 290         PUBWEAK EXTI9_5_IRQHandler\r
 291         SECTION .text:CODE:REORDER(1)\r
 292 EXTI9_5_IRQHandler\r
 293         B EXTI9_5_IRQHandler\r
 294 \r
 295         PUBWEAK TIM1_BRK_TIM15_IRQHandler\r
 296         SECTION .text:CODE:REORDER(1)\r
 297 TIM1_BRK_TIM15_IRQHandler\r
 298         B TIM1_BRK_TIM15_IRQHandler\r
 299 \r
 300         PUBWEAK TIM1_UP_TIM16_IRQHandler\r
 301         SECTION .text:CODE:REORDER(1)\r
 302 TIM1_UP_TIM16_IRQHandler\r
 303         B TIM1_UP_TIM16_IRQHandler\r
 304 \r
 305         PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler\r
 306         SECTION .text:CODE:REORDER(1)\r
 307 TIM1_TRG_COM_TIM17_IRQHandler\r
 308         B TIM1_TRG_COM_TIM17_IRQHandler\r
 309 \r
 310         PUBWEAK TIM1_CC_IRQHandler\r
 311         SECTION .text:CODE:REORDER(1)\r
 312 TIM1_CC_IRQHandler\r
 313         B TIM1_CC_IRQHandler\r
 314 \r
 315         PUBWEAK TIM2_IRQHandler\r
 316         SECTION .text:CODE:REORDER(1)\r
 317 TIM2_IRQHandler\r
 318         B TIM2_IRQHandler\r
 319 \r
 320         PUBWEAK TIM3_IRQHandler\r
 321         SECTION .text:CODE:REORDER(1)\r
 322 TIM3_IRQHandler\r
 323         B TIM3_IRQHandler\r
 324 \r
 325         PUBWEAK TIM4_IRQHandler\r
 326         SECTION .text:CODE:REORDER(1)\r
 327 TIM4_IRQHandler\r
 328         B TIM4_IRQHandler\r
 329 \r
 330         PUBWEAK I2C1_EV_IRQHandler\r
 331         SECTION .text:CODE:REORDER(1)\r
 332 I2C1_EV_IRQHandler\r
 333         B I2C1_EV_IRQHandler\r
 334 \r
 335         PUBWEAK I2C1_ER_IRQHandler\r
 336         SECTION .text:CODE:REORDER(1)\r
 337 I2C1_ER_IRQHandler\r
 338         B I2C1_ER_IRQHandler\r
 339 \r
 340         PUBWEAK I2C2_EV_IRQHandler\r
 341         SECTION .text:CODE:REORDER(1)\r
 342 I2C2_EV_IRQHandler\r
 343         B I2C2_EV_IRQHandler\r
 344 \r
 345         PUBWEAK I2C2_ER_IRQHandler\r
 346         SECTION .text:CODE:REORDER(1)\r
 347 I2C2_ER_IRQHandler\r
 348         B I2C2_ER_IRQHandler\r
 349 \r
 350         PUBWEAK SPI1_IRQHandler\r
 351         SECTION .text:CODE:REORDER(1)\r
 352 SPI1_IRQHandler\r
 353         B SPI1_IRQHandler\r
 354 \r
 355         PUBWEAK SPI2_IRQHandler\r
 356         SECTION .text:CODE:REORDER(1)\r
 357 SPI2_IRQHandler\r
 358         B SPI2_IRQHandler\r
 359 \r
 360         PUBWEAK USART1_IRQHandler\r
 361         SECTION .text:CODE:REORDER(1)\r
 362 USART1_IRQHandler\r
 363         B USART1_IRQHandler\r
 364 \r
 365         PUBWEAK USART2_IRQHandler\r
 366         SECTION .text:CODE:REORDER(1)\r
 367 USART2_IRQHandler\r
 368         B USART2_IRQHandler\r
 369 \r
 370         PUBWEAK USART3_IRQHandler\r
 371         SECTION .text:CODE:REORDER(1)\r
 372 USART3_IRQHandler\r
 373         B USART3_IRQHandler\r
 374 \r
 375         PUBWEAK EXTI15_10_IRQHandler\r
 376         SECTION .text:CODE:REORDER(1)\r
 377 EXTI15_10_IRQHandler\r
 378         B EXTI15_10_IRQHandler\r
 379 \r
 380         PUBWEAK RTCAlarm_IRQHandler\r
 381         SECTION .text:CODE:REORDER(1)\r
 382 RTCAlarm_IRQHandler\r
 383         B RTCAlarm_IRQHandler\r
 384 \r
 385         PUBWEAK CEC_IRQHandler\r
 386         SECTION .text:CODE:REORDER(1)\r
 387 CEC_IRQHandler\r
 388         B CEC_IRQHandler\r
 389 \r
 390         PUBWEAK TIM12_IRQHandler\r
 391         SECTION .text:CODE:REORDER(1)\r
 392 TIM12_IRQHandler\r
 393         B TIM12_IRQHandler\r
 394 \r
 395         PUBWEAK TIM13_IRQHandler\r
 396         SECTION .text:CODE:REORDER(1)\r
 397 TIM13_IRQHandler\r
 398         B TIM13_IRQHandler\r
 399 \r
 400         PUBWEAK TIM14_IRQHandler\r
 401         SECTION .text:CODE:REORDER(1)\r
 402 TIM14_IRQHandler\r
 403         B TIM14_IRQHandler\r
 404 \r
 405         PUBWEAK TIM5_IRQHandler\r
 406         SECTION .text:CODE:REORDER(1)\r
 407 TIM5_IRQHandler\r
 408         B TIM5_IRQHandler\r
 409 \r
 410         PUBWEAK SPI3_IRQHandler\r
 411         SECTION .text:CODE:REORDER(1)\r
 412 SPI3_IRQHandler\r
 413         B SPI3_IRQHandler\r
 414 \r
 415         PUBWEAK UART4_IRQHandler\r
 416         SECTION .text:CODE:REORDER(1)\r
 417 UART4_IRQHandler\r
 418         B UART4_IRQHandler\r
 419 \r
 420         PUBWEAK UART5_IRQHandler\r
 421         SECTION .text:CODE:REORDER(1)\r
 422 UART5_IRQHandler\r
 423         B UART5_IRQHandler\r
 424         \r
 425         PUBWEAK TIM6_DAC_IRQHandler\r
 426         SECTION .text:CODE:REORDER(1)\r
 427 TIM6_DAC_IRQHandler\r
 428         B TIM6_DAC_IRQHandler\r
 429 \r
 430         PUBWEAK TIM7_IRQHandler\r
 431         SECTION .text:CODE:REORDER(1)\r
 432 TIM7_IRQHandler\r
 433         B TIM7_IRQHandler                \r
 434 \r
 435         PUBWEAK DMA2_Channel1_IRQHandler\r
 436         SECTION .text:CODE:REORDER(1)\r
 437 DMA2_Channel1_IRQHandler\r
 438         B DMA2_Channel1_IRQHandler\r
 439 \r
 440         PUBWEAK DMA2_Channel2_IRQHandler\r
 441         SECTION .text:CODE:REORDER(1)\r
 442 DMA2_Channel2_IRQHandler\r
 443         B DMA2_Channel2_IRQHandler\r
 444 \r
 445         PUBWEAK DMA2_Channel3_IRQHandler\r
 446         SECTION .text:CODE:REORDER(1)\r
 447 DMA2_Channel3_IRQHandler\r
 448         B DMA2_Channel3_IRQHandler\r
 449 \r
 450         PUBWEAK DMA2_Channel4_5_IRQHandler\r
 451         SECTION .text:CODE:REORDER(1)\r
 452 DMA2_Channel4_5_IRQHandler\r
 453         B DMA2_Channel4_5_IRQHandler\r
 454 \r
 455         PUBWEAK DMA2_Channel5_IRQHandler\r
 456         SECTION .text:CODE:REORDER(1)\r
 457 DMA2_Channel5_IRQHandler\r
 458         B DMA2_Channel5_IRQHandler\r
 459                 \r
 460         END\r
 461 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/\r