1 @N|Running in 64-bit mode
2 @N|Running in 64-bit mode
3 @N: CD720 :"/home/soft/lattice/diamond/3.10_x64/synpbase/lib/vhd/std.vhd":123:18:123:21|Setting time resolution to ps
4 @N:"/home/adrian/git/trb5sc/template/project/pll_200_200_125_100/pll_200_125_100/pll_200_125_100.vhd":12:7:12:21|Top entity is set to pll_200_125_100.
5 @N: CD630 :"/home/adrian/git/trb5sc/template/project/pll_200_200_125_100/pll_200_125_100/pll_200_125_100.vhd":12:7:12:21|Synthesizing work.pll_200_125_100.structure.
6 @N: CD630 :"/home/soft/lattice/diamond/3.10_x64/synpbase/lib/lucent/ecp5um.vhd":2083:10:2083:16|Synthesizing ecp5um.ehxplll.syn_black_box.
7 @N: CD630 :"/home/soft/lattice/diamond/3.10_x64/synpbase/lib/lucent/ecp5um.vhd":832:10:832:12|Synthesizing ecp5um.vlo.syn_black_box.
8 @N: CD630 :"/home/soft/lattice/diamond/3.10_x64/synpbase/lib/lucent/ecp5um.vhd":825:10:825:12|Synthesizing ecp5um.vhi.syn_black_box.
9 @N|Running in 64-bit mode