2 ******************************************************************************
\r
3 * @file stm32f10x_wwdg.c
\r
4 * @author MCD Application Team
\r
6 * @date 11-March-2011
\r
7 * @brief This file provides all the WWDG firmware functions.
\r
8 ******************************************************************************
\r
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
\r
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
\r
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
\r
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
\r
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
\r
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
\r
18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
\r
19 ******************************************************************************
\r
22 /* Includes ------------------------------------------------------------------*/
\r
23 #include "stm32f10x_wwdg.h"
\r
24 #include "stm32f10x_rcc.h"
\r
26 /** @addtogroup STM32F10x_StdPeriph_Driver
\r
31 * @brief WWDG driver modules
\r
35 /** @defgroup WWDG_Private_TypesDefinitions
\r
43 /** @defgroup WWDG_Private_Defines
\r
47 /* ----------- WWDG registers bit address in the alias region ----------- */
\r
48 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
\r
50 /* Alias word address of EWI bit */
\r
51 #define CFR_OFFSET (WWDG_OFFSET + 0x04)
\r
52 #define EWI_BitNumber 0x09
\r
53 #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
\r
55 /* --------------------- WWDG registers bit mask ------------------------ */
\r
57 /* CR register bit mask */
\r
58 #define CR_WDGA_Set ((uint32_t)0x00000080)
\r
60 /* CFR register bit mask */
\r
61 #define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F)
\r
62 #define CFR_W_Mask ((uint32_t)0xFFFFFF80)
\r
63 #define BIT_Mask ((uint8_t)0x7F)
\r
69 /** @defgroup WWDG_Private_Macros
\r
77 /** @defgroup WWDG_Private_Variables
\r
85 /** @defgroup WWDG_Private_FunctionPrototypes
\r
93 /** @defgroup WWDG_Private_Functions
\r
98 * @brief Deinitializes the WWDG peripheral registers to their default reset values.
\r
102 void WWDG_DeInit(void)
\r
104 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
\r
105 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
\r
109 * @brief Sets the WWDG Prescaler.
\r
110 * @param WWDG_Prescaler: specifies the WWDG Prescaler.
\r
111 * This parameter can be one of the following values:
\r
112 * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
\r
113 * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
\r
114 * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
\r
115 * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
\r
118 void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
\r
120 uint32_t tmpreg = 0;
\r
121 /* Check the parameters */
\r
122 assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
\r
123 /* Clear WDGTB[1:0] bits */
\r
124 tmpreg = WWDG->CFR & CFR_WDGTB_Mask;
\r
125 /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
\r
126 tmpreg |= WWDG_Prescaler;
\r
127 /* Store the new value */
\r
128 WWDG->CFR = tmpreg;
\r
132 * @brief Sets the WWDG window value.
\r
133 * @param WindowValue: specifies the window value to be compared to the downcounter.
\r
134 * This parameter value must be lower than 0x80.
\r
137 void WWDG_SetWindowValue(uint8_t WindowValue)
\r
139 __IO uint32_t tmpreg = 0;
\r
141 /* Check the parameters */
\r
142 assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
\r
143 /* Clear W[6:0] bits */
\r
145 tmpreg = WWDG->CFR & CFR_W_Mask;
\r
147 /* Set W[6:0] bits according to WindowValue value */
\r
148 tmpreg |= WindowValue & (uint32_t) BIT_Mask;
\r
150 /* Store the new value */
\r
151 WWDG->CFR = tmpreg;
\r
155 * @brief Enables the WWDG Early Wakeup interrupt(EWI).
\r
159 void WWDG_EnableIT(void)
\r
161 *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
\r
165 * @brief Sets the WWDG counter value.
\r
166 * @param Counter: specifies the watchdog counter value.
\r
167 * This parameter must be a number between 0x40 and 0x7F.
\r
170 void WWDG_SetCounter(uint8_t Counter)
\r
172 /* Check the parameters */
\r
173 assert_param(IS_WWDG_COUNTER(Counter));
\r
174 /* Write to T[6:0] bits to configure the counter value, no need to do
\r
175 a read-modify-write; writing a 0 to WDGA bit does nothing */
\r
176 WWDG->CR = Counter & BIT_Mask;
\r
180 * @brief Enables WWDG and load the counter value.
\r
181 * @param Counter: specifies the watchdog counter value.
\r
182 * This parameter must be a number between 0x40 and 0x7F.
\r
185 void WWDG_Enable(uint8_t Counter)
\r
187 /* Check the parameters */
\r
188 assert_param(IS_WWDG_COUNTER(Counter));
\r
189 WWDG->CR = CR_WDGA_Set | Counter;
\r
193 * @brief Checks whether the Early Wakeup interrupt flag is set or not.
\r
195 * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
\r
197 FlagStatus WWDG_GetFlagStatus(void)
\r
199 return (FlagStatus)(WWDG->SR);
\r
203 * @brief Clears Early Wakeup interrupt flag.
\r
207 void WWDG_ClearFlag(void)
\r
209 WWDG->SR = (uint32_t)RESET;
\r
224 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
\r