jspc29.x-matter.uni-frankfurt.de Git - mvd_firmware.git/blob

   1 ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************\r
   2 ;* File Name          : startup_stm32f10x_md_vl.s\r
   3 ;* Author             : MCD Application Team\r
   4 ;* Version            : V3.5.0\r
   5 ;* Date               : 11-March-2011\r
   6 ;* Description        : STM32F10x Medium Density Value Line Devices vector table \r
   7 ;*                      for EWARM toolchain.\r
   8 ;*                      This module performs:\r
   9 ;*                      - Set the initial SP\r
  10 ;*                      - Configure the clock system\r
  11 ;*                      - Set the initial PC == __iar_program_start,\r
  12 ;*                      - Set the vector table entries with the exceptions ISR \r
  13 ;*                        address.\r
  14 ;*                      After Reset the Cortex-M3 processor is in Thread mode,\r
  15 ;*                      priority is Privileged, and the Stack is set to Main.\r
  16 ;********************************************************************************\r
  17 ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
  18 ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.\r
  19 ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,\r
  20 ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE\r
  21 ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING\r
  22 ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
  23 ;*******************************************************************************\r
  24 ;\r
  25 ;\r
  26 ; The modules in this file are included in the libraries, and may be replaced\r
  27 ; by any user-defined modules that define the PUBLIC symbol _program_start or\r
  28 ; a user defined start symbol.\r
  29 ; To override the cstartup defined in the library, simply add your modified\r
  30 ; version to the workbench project.\r
  31 ;\r
  32 ; The vector table is normally located at address 0.\r
  33 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.\r
  34 ; The name "__vector_table" has special meaning for C-SPY:\r
  35 ; it is where the SP start value is found, and the NVIC vector\r
  36 ; table register (VTOR) is initialized to this address if != 0.\r
  37 ;\r
  38 ; Cortex-M version\r
  39 ;\r
  40 \r
  41         MODULE  ?cstartup\r
  42 \r
  43         ;; Forward declaration of sections.\r
  44         SECTION CSTACK:DATA:NOROOT(3)\r
  45 \r
  46         SECTION .intvec:CODE:NOROOT(2)\r
  47 \r
  48         EXTERN  __iar_program_start\r
  49         EXTERN  SystemInit        \r
  50         PUBLIC  __vector_table\r
  51 \r
  52         DATA\r
  53 __vector_table\r
  54         DCD     sfe(CSTACK)\r
  55         DCD     Reset_Handler             ; Reset Handler\r
  56         DCD     NMI_Handler               ; NMI Handler\r
  57         DCD     HardFault_Handler         ; Hard Fault Handler\r
  58         DCD     MemManage_Handler         ; MPU Fault Handler\r
  59         DCD     BusFault_Handler          ; Bus Fault Handler\r
  60         DCD     UsageFault_Handler        ; Usage Fault Handler\r
  61         DCD     0                         ; Reserved\r
  62         DCD     0                         ; Reserved\r
  63         DCD     0                         ; Reserved\r
  64         DCD     0                         ; Reserved\r
  65         DCD     SVC_Handler               ; SVCall Handler\r
  66         DCD     DebugMon_Handler          ; Debug Monitor Handler\r
  67         DCD     0                         ; Reserved\r
  68         DCD     PendSV_Handler            ; PendSV Handler\r
  69         DCD     SysTick_Handler           ; SysTick Handler\r
  70 \r
  71          ; External Interrupts\r
  72         DCD     WWDG_IRQHandler               ; Window Watchdog\r
  73         DCD     PVD_IRQHandler                ; PVD through EXTI Line detect\r
  74         DCD     TAMPER_IRQHandler             ; Tamper\r
  75         DCD     RTC_IRQHandler                ; RTC\r
  76         DCD     FLASH_IRQHandler              ; Flash\r
  77         DCD     RCC_IRQHandler                ; RCC\r
  78         DCD     EXTI0_IRQHandler              ; EXTI Line 0\r
  79         DCD     EXTI1_IRQHandler              ; EXTI Line 1\r
  80         DCD     EXTI2_IRQHandler              ; EXTI Line 2\r
  81         DCD     EXTI3_IRQHandler              ; EXTI Line 3\r
  82         DCD     EXTI4_IRQHandler              ; EXTI Line 4\r
  83         DCD     DMA1_Channel1_IRQHandler      ; DMA1 Channel 1\r
  84         DCD     DMA1_Channel2_IRQHandler      ; DMA1 Channel 2\r
  85         DCD     DMA1_Channel3_IRQHandler      ; DMA1 Channel 3\r
  86         DCD     DMA1_Channel4_IRQHandler      ; DMA1 Channel 4\r
  87         DCD     DMA1_Channel5_IRQHandler      ; DMA1 Channel 5\r
  88         DCD     DMA1_Channel6_IRQHandler      ; DMA1 Channel 6\r
  89         DCD     DMA1_Channel7_IRQHandler      ; DMA1 Channel 7\r
  90         DCD     ADC1_IRQHandler               ; ADC1\r
  91         DCD     0                             ; Reserved\r
  92         DCD     0                             ; Reserved\r
  93         DCD     0                             ; Reserved\r
  94         DCD     0                             ; Reserved\r
  95         DCD     EXTI9_5_IRQHandler            ; EXTI Line 9..5\r
  96         DCD     TIM1_BRK_TIM15_IRQHandler     ; TIM1 Break and TIM15\r
  97         DCD     TIM1_UP_TIM16_IRQHandler      ; TIM1 Update and TIM16\r
  98         DCD     TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17\r
  99         DCD     TIM1_CC_IRQHandler            ; TIM1 Capture Compare\r
 100         DCD     TIM2_IRQHandler               ; TIM2\r
 101         DCD     TIM3_IRQHandler               ; TIM3\r
 102         DCD     TIM4_IRQHandler               ; TIM4\r
 103         DCD     I2C1_EV_IRQHandler            ; I2C1 Event\r
 104         DCD     I2C1_ER_IRQHandler            ; I2C1 Error\r
 105         DCD     I2C2_EV_IRQHandler            ; I2C2 Event\r
 106         DCD     I2C2_ER_IRQHandler            ; I2C2 Error\r
 107         DCD     SPI1_IRQHandler               ; SPI1\r
 108         DCD     SPI2_IRQHandler               ; SPI2\r
 109         DCD     USART1_IRQHandler             ; USART1\r
 110         DCD     USART2_IRQHandler             ; USART2\r
 111         DCD     USART3_IRQHandler             ; USART3\r
 112         DCD     EXTI15_10_IRQHandler          ; EXTI Line 15..10\r
 113         DCD     RTCAlarm_IRQHandler           ; RTC Alarm through EXTI Line\r
 114         DCD     CEC_IRQHandler                ; HDMI-CEC\r
 115         DCD     0                             ; Reserved\r
 116         DCD     0                             ; Reserved\r
 117         DCD     0                             ; Reserved\r
 118         DCD     0                             ; Reserved\r
 119         DCD     0                             ; Reserved\r
 120         DCD     0                             ; Reserved\r
 121         DCD     0                             ; Reserved\r
 122         DCD     0                             ; Reserved\r
 123         DCD     0                             ; Reserved\r
 124         DCD     0                             ; Reserved\r
 125         DCD     0                             ; Reserved                        \r
 126         DCD     TIM6_DAC_IRQHandler           ; TIM6 and DAC underrun\r
 127         DCD     TIM7_IRQHandler               ; TIM7                \r
 128 \r
 129 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
 130 ;;\r
 131 ;; Default interrupt handlers.\r
 132 ;;\r
 133         THUMB\r
 134 \r
 135         PUBWEAK Reset_Handler\r
 136         SECTION .text:CODE:REORDER(2)\r
 137 Reset_Handler\r
 138         LDR     R0, =SystemInit\r
 139         BLX     R0\r
 140         LDR     R0, =__iar_program_start\r
 141         BX      R0\r
 142         \r
 143         PUBWEAK NMI_Handler\r
 144         SECTION .text:CODE:REORDER(1)\r
 145 NMI_Handler\r
 146         B NMI_Handler\r
 147 \r
 148         PUBWEAK HardFault_Handler\r
 149         SECTION .text:CODE:REORDER(1)\r
 150 HardFault_Handler\r
 151         B HardFault_Handler\r
 152 \r
 153         PUBWEAK MemManage_Handler\r
 154         SECTION .text:CODE:REORDER(1)\r
 155 MemManage_Handler\r
 156         B MemManage_Handler\r
 157 \r
 158         PUBWEAK BusFault_Handler\r
 159         SECTION .text:CODE:REORDER(1)\r
 160 BusFault_Handler\r
 161         B BusFault_Handler\r
 162 \r
 163         PUBWEAK UsageFault_Handler\r
 164         SECTION .text:CODE:REORDER(1)\r
 165 UsageFault_Handler\r
 166         B UsageFault_Handler\r
 167 \r
 168         PUBWEAK SVC_Handler\r
 169         SECTION .text:CODE:REORDER(1)\r
 170 SVC_Handler\r
 171         B SVC_Handler\r
 172 \r
 173         PUBWEAK DebugMon_Handler\r
 174         SECTION .text:CODE:REORDER(1)\r
 175 DebugMon_Handler\r
 176         B DebugMon_Handler\r
 177 \r
 178         PUBWEAK PendSV_Handler\r
 179         SECTION .text:CODE:REORDER(1)\r
 180 PendSV_Handler\r
 181         B PendSV_Handler\r
 182 \r
 183         PUBWEAK SysTick_Handler\r
 184         SECTION .text:CODE:REORDER(1)\r
 185 SysTick_Handler\r
 186         B SysTick_Handler\r
 187 \r
 188         PUBWEAK WWDG_IRQHandler\r
 189         SECTION .text:CODE:REORDER(1)\r
 190 WWDG_IRQHandler\r
 191         B WWDG_IRQHandler\r
 192 \r
 193         PUBWEAK PVD_IRQHandler\r
 194         SECTION .text:CODE:REORDER(1)\r
 195 PVD_IRQHandler\r
 196         B PVD_IRQHandler\r
 197 \r
 198         PUBWEAK TAMPER_IRQHandler\r
 199         SECTION .text:CODE:REORDER(1)\r
 200 TAMPER_IRQHandler\r
 201         B TAMPER_IRQHandler\r
 202 \r
 203         PUBWEAK RTC_IRQHandler\r
 204         SECTION .text:CODE:REORDER(1)\r
 205 RTC_IRQHandler\r
 206         B RTC_IRQHandler\r
 207 \r
 208         PUBWEAK FLASH_IRQHandler\r
 209         SECTION .text:CODE:REORDER(1)\r
 210 FLASH_IRQHandler\r
 211         B FLASH_IRQHandler\r
 212 \r
 213         PUBWEAK RCC_IRQHandler\r
 214         SECTION .text:CODE:REORDER(1)\r
 215 RCC_IRQHandler\r
 216         B RCC_IRQHandler\r
 217 \r
 218         PUBWEAK EXTI0_IRQHandler\r
 219         SECTION .text:CODE:REORDER(1)\r
 220 EXTI0_IRQHandler\r
 221         B EXTI0_IRQHandler\r
 222 \r
 223         PUBWEAK EXTI1_IRQHandler\r
 224         SECTION .text:CODE:REORDER(1)\r
 225 EXTI1_IRQHandler\r
 226         B EXTI1_IRQHandler\r
 227 \r
 228         PUBWEAK EXTI2_IRQHandler\r
 229         SECTION .text:CODE:REORDER(1)\r
 230 EXTI2_IRQHandler\r
 231         B EXTI2_IRQHandler\r
 232 \r
 233         PUBWEAK EXTI3_IRQHandler\r
 234         SECTION .text:CODE:REORDER(1)\r
 235 EXTI3_IRQHandler\r
 236         B EXTI3_IRQHandler\r
 237 \r
 238         PUBWEAK EXTI4_IRQHandler\r
 239         SECTION .text:CODE:REORDER(1)\r
 240 EXTI4_IRQHandler\r
 241         B EXTI4_IRQHandler\r
 242 \r
 243         PUBWEAK DMA1_Channel1_IRQHandler\r
 244         SECTION .text:CODE:REORDER(1)\r
 245 DMA1_Channel1_IRQHandler\r
 246         B DMA1_Channel1_IRQHandler\r
 247 \r
 248         PUBWEAK DMA1_Channel2_IRQHandler\r
 249         SECTION .text:CODE:REORDER(1)\r
 250 DMA1_Channel2_IRQHandler\r
 251         B DMA1_Channel2_IRQHandler\r
 252 \r
 253         PUBWEAK DMA1_Channel3_IRQHandler\r
 254         SECTION .text:CODE:REORDER(1)\r
 255 DMA1_Channel3_IRQHandler\r
 256         B DMA1_Channel3_IRQHandler\r
 257 \r
 258         PUBWEAK DMA1_Channel4_IRQHandler\r
 259         SECTION .text:CODE:REORDER(1)\r
 260 DMA1_Channel4_IRQHandler\r
 261         B DMA1_Channel4_IRQHandler\r
 262 \r
 263         PUBWEAK DMA1_Channel5_IRQHandler\r
 264         SECTION .text:CODE:REORDER(1)\r
 265 DMA1_Channel5_IRQHandler\r
 266         B DMA1_Channel5_IRQHandler\r
 267 \r
 268         PUBWEAK DMA1_Channel6_IRQHandler\r
 269         SECTION .text:CODE:REORDER(1)\r
 270 DMA1_Channel6_IRQHandler\r
 271         B DMA1_Channel6_IRQHandler\r
 272 \r
 273         PUBWEAK DMA1_Channel7_IRQHandler\r
 274         SECTION .text:CODE:REORDER(1)\r
 275 DMA1_Channel7_IRQHandler\r
 276         B DMA1_Channel7_IRQHandler\r
 277 \r
 278         PUBWEAK ADC1_IRQHandler\r
 279         SECTION .text:CODE:REORDER(1)\r
 280 ADC1_IRQHandler\r
 281         B ADC1_IRQHandler\r
 282 \r
 283         PUBWEAK EXTI9_5_IRQHandler\r
 284         SECTION .text:CODE:REORDER(1)\r
 285 EXTI9_5_IRQHandler\r
 286         B EXTI9_5_IRQHandler\r
 287 \r
 288         PUBWEAK TIM1_BRK_TIM15_IRQHandler\r
 289         SECTION .text:CODE:REORDER(1)\r
 290 TIM1_BRK_TIM15_IRQHandler\r
 291         B TIM1_BRK_TIM15_IRQHandler\r
 292 \r
 293         PUBWEAK TIM1_UP_TIM16_IRQHandler\r
 294         SECTION .text:CODE:REORDER(1)\r
 295 TIM1_UP_TIM16_IRQHandler\r
 296         B TIM1_UP_TIM16_IRQHandler\r
 297 \r
 298         PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler\r
 299         SECTION .text:CODE:REORDER(1)\r
 300 TIM1_TRG_COM_TIM17_IRQHandler\r
 301         B TIM1_TRG_COM_TIM17_IRQHandler\r
 302 \r
 303         PUBWEAK TIM1_CC_IRQHandler\r
 304         SECTION .text:CODE:REORDER(1)\r
 305 TIM1_CC_IRQHandler\r
 306         B TIM1_CC_IRQHandler\r
 307 \r
 308         PUBWEAK TIM2_IRQHandler\r
 309         SECTION .text:CODE:REORDER(1)\r
 310 TIM2_IRQHandler\r
 311         B TIM2_IRQHandler\r
 312 \r
 313         PUBWEAK TIM3_IRQHandler\r
 314         SECTION .text:CODE:REORDER(1)\r
 315 TIM3_IRQHandler\r
 316         B TIM3_IRQHandler\r
 317 \r
 318         PUBWEAK TIM4_IRQHandler\r
 319         SECTION .text:CODE:REORDER(1)\r
 320 TIM4_IRQHandler\r
 321         B TIM4_IRQHandler\r
 322 \r
 323         PUBWEAK I2C1_EV_IRQHandler\r
 324         SECTION .text:CODE:REORDER(1)\r
 325 I2C1_EV_IRQHandler\r
 326         B I2C1_EV_IRQHandler\r
 327 \r
 328         PUBWEAK I2C1_ER_IRQHandler\r
 329         SECTION .text:CODE:REORDER(1)\r
 330 I2C1_ER_IRQHandler\r
 331         B I2C1_ER_IRQHandler\r
 332 \r
 333         PUBWEAK I2C2_EV_IRQHandler\r
 334         SECTION .text:CODE:REORDER(1)\r
 335 I2C2_EV_IRQHandler\r
 336         B I2C2_EV_IRQHandler\r
 337 \r
 338         PUBWEAK I2C2_ER_IRQHandler\r
 339         SECTION .text:CODE:REORDER(1)\r
 340 I2C2_ER_IRQHandler\r
 341         B I2C2_ER_IRQHandler\r
 342 \r
 343         PUBWEAK SPI1_IRQHandler\r
 344         SECTION .text:CODE:REORDER(1)\r
 345 SPI1_IRQHandler\r
 346         B SPI1_IRQHandler\r
 347 \r
 348         PUBWEAK SPI2_IRQHandler\r
 349         SECTION .text:CODE:REORDER(1)\r
 350 SPI2_IRQHandler\r
 351         B SPI2_IRQHandler\r
 352 \r
 353         PUBWEAK USART1_IRQHandler\r
 354         SECTION .text:CODE:REORDER(1)\r
 355 USART1_IRQHandler\r
 356         B USART1_IRQHandler\r
 357 \r
 358         PUBWEAK USART2_IRQHandler\r
 359         SECTION .text:CODE:REORDER(1)\r
 360 USART2_IRQHandler\r
 361         B USART2_IRQHandler\r
 362 \r
 363         PUBWEAK USART3_IRQHandler\r
 364         SECTION .text:CODE:REORDER(1)\r
 365 USART3_IRQHandler\r
 366         B USART3_IRQHandler\r
 367 \r
 368         PUBWEAK EXTI15_10_IRQHandler\r
 369         SECTION .text:CODE:REORDER(1)\r
 370 EXTI15_10_IRQHandler\r
 371         B EXTI15_10_IRQHandler\r
 372 \r
 373         PUBWEAK RTCAlarm_IRQHandler\r
 374         SECTION .text:CODE:REORDER(1)\r
 375 RTCAlarm_IRQHandler\r
 376         B RTCAlarm_IRQHandler\r
 377 \r
 378         PUBWEAK CEC_IRQHandler\r
 379         SECTION .text:CODE:REORDER(1)\r
 380 CEC_IRQHandler\r
 381         B CEC_IRQHandler\r
 382 \r
 383         PUBWEAK TIM6_DAC_IRQHandler\r
 384         SECTION .text:CODE:REORDER(1)\r
 385 TIM6_DAC_IRQHandler\r
 386         B TIM6_DAC_IRQHandler\r
 387 \r
 388         PUBWEAK TIM7_IRQHandler\r
 389         SECTION .text:CODE:REORDER(1)\r
 390 TIM7_IRQHandler\r
 391         B TIM7_IRQHandler                \r
 392 \r
 393         END\r
 394 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/\r