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(parent: 8e9464a) | patch
calibration and data trigger switching problem is fixed
authorCahit <c.ugur@gsi.de>
Fri, 5 Dec 2014 14:59:04 +0000 (15:59 +0100)
committerCahit <c.ugur@gsi.de>
Fri, 5 Dec 2014 14:59:04 +0000 (15:59 +0100)
commit09319e4fe67585fd93f6253fe607d7b4eac37dc2
tree0d1a1072fe87fa3c2c090d71c50b547a02cbb344tree | snapshot
parent8e9464a027cdf51940b3d79aa4c87d258fa453d9commit | diff
calibration and data trigger switching problem is fixed
31 files changed:
tdc_releases/ReleaseNotes.txt diff | blob | history
tdc_releases/tdc_v2.0.1/Adder_304.ngo [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/Adder_304.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/BusHandler.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/Channel.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/Channel_200.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/Encoder_304_Bit.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/LogicAnalyser.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/ROM_encoder_3.vhd [new symlink] blob
tdc_releases/tdc_v2.0.1/Readout.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/ShiftRegisterSISO.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/Stretcher.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/Stretcher_A.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/Stretcher_B.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/TDC.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/TriggerHandler.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/bit_sync.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/fallingEdgeDetect.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/hit_mux.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/risingEdgeDetect.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/rom_encoder/ROM_encoder_3.ipx [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/rom_encoder/ROM_encoder_3.lpc [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/rom_encoder/ROM_encoder_3.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/rom_encoder/rom_encoder.mem [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/tdc_components.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/tdc_constraints_64.lpf [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/tdc_version.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/trb3_periph_32PinAddOn.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/trbnet_constraints.lpf [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/unimportant_lines_constraints.lpf [new file with mode: 0644] blob
tdc_releases/tdc_v2.0.1/up_counter.vhd [new file with mode: 0644] blob
TRB3 VHDL