jspc29.x-matter.uni-frankfurt.de Git

]> jspc29.x-matter.uni-frankfurt.de Git - cri.git/commit

author	Thomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
	Sat, 12 Sep 2020 12:46:45 +0000 (14:46 +0200)
committer	Thomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
	Sat, 12 Sep 2020 12:46:45 +0000 (14:46 +0200)
commit	0d056a0cc8ab304b5bbfbda2a7f945ae9d12a967
tree	786e1dcd5123ec1054360f8d27f3a076048bd8d8	tree \| snapshot
parent	96a887dd27a824f6ba20321d2f6671961d606ee5	commit \| diff

hub_test: Remove bd/ directory

It is apparently sufficient to track the .bd file.

32 files changed:

hub_test/bd/design_1/ip/design_1_axi_gpio_0_0/design_1_axi_gpio_0_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_axi_gpio_0_0/design_1_axi_gpio_0_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_axi_gpio_0_1/design_1_axi_gpio_0_1.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_axi_gpio_0_1/design_1_axi_gpio_0_1.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_axi_iic_0_0/design_1_axi_iic_0_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_axi_iic_0_0/design_1_axi_iic_0_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_axi_timer_0_0/design_1_axi_timer_0_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_axi_timer_0_0/design_1_axi_timer_0_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_dlmb_bram_if_cntlr_0/design_1_dlmb_bram_if_cntlr_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_dlmb_bram_if_cntlr_0/design_1_dlmb_bram_if_cntlr_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_dlmb_v10_0/design_1_dlmb_v10_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_dlmb_v10_0/design_1_dlmb_v10_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_ilmb_bram_if_cntlr_0/design_1_ilmb_bram_if_cntlr_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_ilmb_bram_if_cntlr_0/design_1_ilmb_bram_if_cntlr_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_ilmb_v10_0/design_1_ilmb_v10_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_ilmb_v10_0/design_1_ilmb_v10_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_lmb_bram_0/design_1_lmb_bram_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_lmb_bram_0/design_1_lmb_bram_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_mdm_1_0/design_1_mdm_1_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_mdm_1_0/design_1_mdm_1_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_microblaze_0_0/design_1_microblaze_0_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_microblaze_0_0/design_1_microblaze_0_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_microblaze_0_axi_intc_0/design_1_microblaze_0_axi_intc_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_microblaze_0_axi_intc_0/design_1_microblaze_0_axi_intc_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_microblaze_0_axi_periph_0/design_1_microblaze_0_axi_periph_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_microblaze_0_axi_periph_0/design_1_microblaze_0_axi_periph_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_microblaze_0_xlconcat_0/design_1_microblaze_0_xlconcat_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_microblaze_0_xlconcat_0/design_1_microblaze_0_xlconcat_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_rst_Clk_100M_0/design_1_rst_Clk_100M_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_rst_Clk_100M_0/design_1_rst_Clk_100M_0.xml	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_xbar_0/design_1_xbar_0.xci	[deleted file]	blob \| history
hub_test/bd/design_1/ip/design_1_xbar_0/design_1_xbar_0.xml	[deleted file]	blob \| history

VHDL modules for TrbNet on CBM Xilinx hardware

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