jspc29.x-matter.uni-frankfurt.de Git

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23 files changed:

trb_net16_api_base.vhd		diff \| blob \| history
trb_net16_endpoint_0_trg_1_api.vhd		diff \| blob \| history
trb_net16_ibuf.vhd		diff \| blob \| history
trb_net16_io_multiplexer.vhd		diff \| blob \| history
trb_net16_iobuf.vhd		diff \| blob \| history
trb_net16_med_tlk.vhd		diff \| blob \| history
trb_net16_obuf.vhd		diff \| blob \| history
trb_net_pattern_gen.vhd		diff \| blob \| history
trb_net_priority_arbiter.vhd		diff \| blob \| history
trb_net_priority_encoder.vhd		diff \| blob \| history
trb_net_std.vhd		diff \| blob \| history
xilinx/trb_net_fifo_16bit_bram_dualport_arch.vhd		diff \| blob \| history
xilinx/virtex2/simulation/xilinx_fifo_18x16.vhd	[new file with mode: 0644]	blob
xilinx/virtex2/simulation/xilinx_fifo_18x1k.vhd	[new file with mode: 0644]	blob
xilinx/virtex2/simulation/xilinx_fifo_18x32.vhd	[new file with mode: 0644]	blob
xilinx/virtex2/simulation/xilinx_fifo_18x64.vhd	[new file with mode: 0644]	blob
xilinx/virtex2/simulation/xilinx_fifo_dualport_18x1k.vhd	[new file with mode: 0644]	blob
xilinx/virtex2/xilinx_fifo_dualport_18x1k.xco	[new file with mode: 0644]	blob
xilinx/virtex4/simulation/xilinx_fifo_18x16.vhd	[new file with mode: 0644]	blob
xilinx/virtex4/simulation/xilinx_fifo_18x1k.vhd	[new file with mode: 0644]	blob
xilinx/virtex4/simulation/xilinx_fifo_18x32.vhd	[new file with mode: 0644]	blob
xilinx/virtex4/simulation/xilinx_fifo_18x64.vhd	[new file with mode: 0644]	blob
xilinx/virtex4/xilinx_fifo_dualport_18x1k.xco	[new file with mode: 0644]	blob

TrbNet VHDL code