jspc29.x-matter.uni-frankfurt.de Git

]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commit

add both serdes configurations for single serdes in ECP5 to trbnet.git

media_interfaces/ecp5/chan0_0/serdes_sync_0.lpc	[moved from media_interfaces/ecp5/serdes_sync_0/serdes_sync_0.lpc with 93% similarity]	diff \| blob \| history
media_interfaces/ecp5/chan0_0/serdes_sync_0.vhd	[moved from media_interfaces/ecp5/serdes_sync_0/serdes_sync_0.vhd with 99% similarity]	diff \| blob \| history
media_interfaces/ecp5/chan0_1/serdes_sync_0.lpc	[new file with mode: 0644]	blob
media_interfaces/ecp5/chan0_1/serdes_sync_0.vhd	[new file with mode: 0644]	blob
media_interfaces/ecp5/pcs.vhd	[new file with mode: 0644]	blob
media_interfaces/ecp5/serdes_sync_0/serdes_sync_0.fdc	[deleted file]	blob \| history
media_interfaces/ecp5/serdes_sync_0/serdes_sync_0.sbx	[deleted file]	blob \| history
media_interfaces/ecp5/serdes_sync_0_softlogic.v	[moved from media_interfaces/ecp5/serdes_sync_0/serdes_sync_0_softlogic.v with 100% similarity]	blob \| history
media_interfaces/med_ecp5_sfp_sync.vhd		diff \| blob \| history
media_interfaces/sync/sci_reader.vhd		diff \| blob \| history

TrbNet VHDL code