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(parent: e0936da) | patch
second release with 24 channels
authorhadaq <hadaq>
Sat, 10 Mar 2012 08:10:19 +0000 (08:10 +0000)
committerhadaq <hadaq>
Sat, 10 Mar 2012 08:10:19 +0000 (08:10 +0000)
commit3e4e15090cbc853ea0c94ce132f04278a636c5e0
tree315bf6ac3cfcba267193e03e1cf8cbbe8fb73615tree | snapshot
parente0936da1b2bd1c3e5a237840152d4c1f857abffccommit | diff
second release with 24 channels
19 files changed:
tdc_releases/tdc_v0.1/README.txt [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/bit_file/trb3_periph.bit [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/documentations/TDC_data_format.pdf [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/documentations/trb3_ctrl_stat_regs.odt [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/lpf_file/trb3_periph_constraints.lpf [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/prj_file/trb3_periph.prj [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/Adder_304.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/Channel.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/Encoder_304_Bit.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/Encoder_304_ROMsuz.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/FIFO_32x512_OutReg.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/ROM_Encoder.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/ROM_FIFO.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/Reference_channel.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/TDC.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/bit_sync.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/reset_generator.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/trb3_periph.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.1/source/up_counter.vhd [new file with mode: 0644] blob
TRB3 VHDL