]> jspc29.x-matter.uni-frankfurt.de Git - trb3.git/commit
jspc29 / trb3.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 7303c8a) | patch
Changing the PLL to 325MHz to cope with 65MS (hopefully)
authorAndreas Neiser <neiser@kph.uni-mainz.de>
Tue, 10 Feb 2015 13:53:25 +0000 (14:53 +0100)
committerAndreas Neiser <neiser@kph.uni-mainz.de>
Sat, 13 Jun 2015 15:36:55 +0000 (17:36 +0200)
commit3e75f314152a66b610e53e5d4f65b6a0658d5626
tree8fac21b46bae8ced09112518abb2a2a13e017adatree | snapshot
parent7303c8a1b7841821eb25d86522ae1ad6a4ea7c43commit | diff
Changing the PLL to 325MHz to cope with 65MS (hopefully)
ADC/source/adc_ad9219.vhd diff | blob | history
ADC/trb3_periph_adc.prj diff | blob | history
base/cores/pll_adc10bit_65.ipx [new file with mode: 0644] blob
base/cores/pll_adc10bit_65.lpc [new file with mode: 0644] blob
base/cores/pll_adc10bit_65.vhd [new file with mode: 0644] blob
TRB3 VHDL