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(parent: 616b1f8) | patch
add a gitignore and the source files for data sending and receiving between CRI and...
authorAdrian Weber <adrian.a.weber@exp2.physik.uni-giessen.de>
Thu, 16 Jul 2020 14:04:36 +0000 (16:04 +0200)
committerAdrian Weber <adrian.a.weber@exp2.physik.uni-giessen.de>
Thu, 16 Jul 2020 14:04:36 +0000 (16:04 +0200)
commit50b67f53aad5ac7011ea03486e07f13c19284c17
tree97b23533efe2c9ca038a9f105b3fa58b22d6c190tree | snapshot
parent616b1f8e94a61dc39a06e744919f16ad4b228c17commit | diff
add a gitignore and the source files for data sending and receiving between CRI and Combiners
.gitignore [new file with mode: 0644] blob
src/cri_data_receiver.vhd [new file with mode: 0644] blob
src/cri_data_sender.vhd [new file with mode: 0644] blob
src/hub/trb_net16_cri_hub_base2.vhd [new file with mode: 0644] blob
VHDL modules for TrbNet on CBM Xilinx hardware