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Change settings for Xilinx CDC FIFO
authorThomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
Mon, 24 Aug 2020 13:52:06 +0000 (15:52 +0200)
committerThomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
Mon, 24 Aug 2020 13:52:06 +0000 (15:52 +0200)
commit6226b19ad4fe2cf3a21ac9d3c7c721d6291ed0a4
treea4a20c7e28321cad790b9126dc07e03d03374460tree | snapshot
parent05e9f2b10647ab983182000e7448573c57cb564acommit | diff
Change settings for Xilinx CDC FIFO

Add safety circuit and change the full-flag reset value. These settings
were found to prevent slow control-related crashes.
xilinx/xcku/fifo_18x16_dualport_oreg_xcku/fifo_18x16_dualport_oreg_xcku.xci diff | blob | history
xilinx/xcku/fifo_18x16_dualport_oreg_xcku/fifo_18x16_dualport_oreg_xcku.xml diff | blob | history
TrbNet VHDL code