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(parent: 225c49d) | patch
Now all regions are defined properly according to floorplan view
authorAndreas Neiser <neiser@kph.uni-mainz.de>
Thu, 26 Feb 2015 12:40:08 +0000 (13:40 +0100)
committerAndreas Neiser <neiser@kph.uni-mainz.de>
Sat, 13 Jun 2015 15:37:00 +0000 (17:37 +0200)
commit83de88e1aa37ac440d5ad9d296c8d3353399c298
tree709e968687e437be9ef2c7cabee4d7a455fdca44tree | snapshot
parent225c49dad57d2ec2c6683c787526980942317921commit | diff
Now all regions are defined properly according to floorplan view
ADC/trb3_periph_adc_constraints.lpf diff | blob | history
TRB3 VHDL