]> jspc29.x-matter.uni-frankfurt.de Git - cri.git/commit
Merge commit '8dd99c8843ba968c8b98a1de0dd3377a94603a9e' as 'hub_test/src/tx_phase_ali...
authorThomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
Thu, 25 Feb 2021 09:48:21 +0000 (10:48 +0100)
committerThomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
Thu, 25 Feb 2021 09:49:01 +0000 (10:49 +0100)
commit8b4eaa0aff86d7acc39b14bf32d0a2c0532c65a7
tree1c9ffbd5d4b9f32881b6e6a2911bce7aa9dc0f03
parent56ff21daa17230d4ed963144fae0918d51b916cf
parent8dd99c8843ba968c8b98a1de0dd3377a94603a9e
Merge commit '8dd99c8843ba968c8b98a1de0dd3377a94603a9e' as 'hub_test/src/tx_phase_aligner'

Add TX phase aligner core from CERN HPTD project:

https://gitlab.cern.ch/HPTD/tx_phase_aligner

This achieves TX phase alignment to a reference clock by the method
described in:

E. Mendes, S. Baron, C. Soos, J. Troska and P. Novellini, "Achieving
Picosecond-Level Phase Stability in Timing Distribution Systems With
Xilinx Ultrascale Transceivers," in IEEE Transactions on Nuclear
Science, vol. 67, no. 3, pp. 473-481, March 2020, doi:
10.1109/TNS.2020.2968112.
26 files changed:
hub_test/src/tx_phase_aligner/.gitkeep
hub_test/src/tx_phase_aligner/README.md
hub_test/src/tx_phase_aligner/license.txt
hub_test/src/tx_phase_aligner/run_script_tcl.bat
hub_test/src/tx_phase_aligner/scripts/sim/tx_phase_aligner_simu.tcl
hub_test/src/tx_phase_aligner/scripts/sim/tx_phase_aligner_simu.wcfg
hub_test/src/tx_phase_aligner/source/constrs/imports/example_design/gtwizard_ultrascale_0_example_top.xdc
hub_test/src/tx_phase_aligner/source/sim/imports/example_design/gtwizard_ultrascale_0_example_top_sim.v
hub_test/src/tx_phase_aligner/source/synth/imports/design_tx_aligner/fifo_fill_level_acc.vhd
hub_test/src/tx_phase_aligner/source/synth/imports/design_tx_aligner/tx_phase_aligner.vhd
hub_test/src/tx_phase_aligner/source/synth/imports/design_tx_aligner/tx_phase_aligner_fsm.vhd
hub_test/src/tx_phase_aligner/source/synth/imports/design_tx_aligner/tx_pi_ctrl.vhd
hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_bit_synchronizer.v
hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_checking_raw.v
hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_init.v
hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_reset_synchronizer.v
hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_stimulus_raw.v
hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_top.v
hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_wrapper.v
hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_example_wrapper_functions.vh
hub_test/src/tx_phase_aligner/source/synth/imports/example_design/gtwizard_ultrascale_0_prbs_any.v
hub_test/src/tx_phase_aligner/source/synth/imports/example_design/rx_word_aligner.vhd
hub_test/src/tx_phase_aligner/source/synth/ip/gtwizard_ultrascale_0.xcix
hub_test/src/tx_phase_aligner/source/synth/ip/gtwizard_ultrascale_0_vio_0.xcix
hub_test/src/tx_phase_aligner/tx_aligner_proj.tcl
hub_test/src/tx_phase_aligner/tx_phase_aligner_reference_note.pdf