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(parent: 3028643) | patch
DCA bridge to trbNet in a UDP/GBE like manner. Testbench added. Only write direction...
authorAdrian Weber <adrian.a.weber@exp2.physik.uni-giessen.de>
Tue, 2 Mar 2021 15:28:55 +0000 (16:28 +0100)
committerAdrian Weber <adrian.a.weber@exp2.physik.uni-giessen.de>
Tue, 2 Mar 2021 15:28:55 +0000 (16:28 +0100)
commit988a18385a9e36f7551f56ac743c623a9ee841b9
tree653985ea63d861efe959eb31567a719f304485e0tree | snapshot
parent30286432cb3c49f9aca3ea6b53490de8aab4cfe7commit | diff
DCA bridge to trbNet in a UDP/GBE like manner. Testbench added. Only write direction is tested in simulation.
16 files changed:
src/DCA_bridge_tb/DCA_bridge_tb.mpf [new file with mode: 0644] blob
src/DCA_bridge_tb/DCA_bridge_tb.vhd [new file with mode: 0644] blob
src/DCA_bridge_tb/transcript [new file with mode: 0644] blob
src/DCA_bridge_tb/wave.do [new file with mode: 0644] blob
src/DCA_bridge_tb/wishbone_pkg.vhd [new file with mode: 0644] blob
src/DCA_cores/ecp3/fifo_2kx34x17_wcnt/fifo_2kx34x17_wcnt.ipx [new file with mode: 0644] blob
src/DCA_cores/ecp3/fifo_2kx34x17_wcnt/fifo_2kx34x17_wcnt.lpc [new file with mode: 0644] blob
src/DCA_cores/ecp3/fifo_2kx34x17_wcnt/fifo_2kx34x17_wcnt.vhd [new file with mode: 0644] blob
src/DCA_cores/ecp3/fifo_4kx16x32_wcnt/fifo_4kx16x32_wcnt.ipx [new file with mode: 0644] blob
src/DCA_cores/ecp3/fifo_4kx16x32_wcnt/fifo_4kx16x32_wcnt.lpc [new file with mode: 0644] blob
src/DCA_cores/ecp3/fifo_4kx16x32_wcnt/fifo_4kx16x32_wcnt.vhd [new file with mode: 0644] blob
src/DCA_cores/ecp3/fifo_64kx16x32_wcnt/fifo_64kx16x32_wcnt.ipx [new file with mode: 0644] blob
src/DCA_cores/ecp3/fifo_64kx16x32_wcnt/fifo_64kx16x32_wcnt.lpc [new file with mode: 0644] blob
src/DCA_cores/ecp3/fifo_64kx16x32_wcnt/fifo_64kx16x32_wcnt.vhd [new file with mode: 0644] blob
src/cri_trbnet_dca_bridge.vhd [new file with mode: 0644] blob
src/cri_trbnet_dca_bridge_handler.vhd [new file with mode: 0644] blob
VHDL modules for TrbNet on CBM Xilinx hardware