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(parent: 57bcaa0) | patch
First release of the tdc.
authorhadaq <hadaq>
Sat, 10 Mar 2012 07:10:11 +0000 (07:10 +0000)
committerhadaq <hadaq>
Sat, 10 Mar 2012 07:10:11 +0000 (07:10 +0000)
commit9fd81aa59975f04d533516d9303ef6b14cef691f
tree0868086bd5085c7cf5cccf0ab9f3c81c817e06a0tree | snapshot
parent57bcaa04d6970d026eba87c48e9048258828c2e0commit | diff
First release of the tdc.
16 files changed:
tdc_releases/tdc_v0.0/bit_file/trb3_periph.bit [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/lpf_file/trb3_periph_constraints.lpf [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/prj_file/trb3_periph.prj [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/Adder_304.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/Channel.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/Encoder_304_Bit.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/Encoder_304_ROMsuz.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/FIFO_32x512_OutReg.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/ROM_Encoder.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/ROM_FIFO.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/Reference_channel.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/TDC.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/bit_sync.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/reset_generator.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/trb3_periph.vhd [new file with mode: 0644] blob
tdc_releases/tdc_v0.0/source/up_counter.vhd [new file with mode: 0644] blob
TRB3 VHDL