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(parent: 5270978) | patch
fixed the problem with the missing reference channel with trigger window
authorCahit <c.ugur@gsi.de>
Mon, 11 May 2015 06:58:43 +0000 (08:58 +0200)
committerCahit <c.ugur@gsi.de>
Mon, 11 May 2015 06:58:43 +0000 (08:58 +0200)
commita998dbc90dba97010b8c8edfe5be550cb5da97c5
treeb1bdd9875364888e0b504957815f81d01a41505atree | snapshot
parent527097847845fd6bf5c0a9686f6d16a6ea39220fcommit | diff
fixed the problem with the missing reference channel with trigger window
30 files changed:
base/cores/ecp3/PLL/generate_core.tcl diff | blob | history
base/cores/ecp3/PLL/generate_ngd.tcl diff | blob | history
base/cores/ecp3/PLL/msg_file.log diff | blob | history
base/cores/ecp3/PLL/pll_in125_out33.edn [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out33.ipx [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out33.jhd [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out33.lpc [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out33.sort [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out33.srp [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out33.vhd [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out333.edn [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out333.ipx [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out333.jhd [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out333.lpc [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out333.sort [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out333.srp [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out333.vhd [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out333_generate.log [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out333_tmpl.vhd [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out33_generate.log [new file with mode: 0644] blob
base/cores/ecp3/PLL/pll_in125_out33_tmpl.vhd [new file with mode: 0644] blob
releases/tdc_v2.1.2/Channel_200.vhd diff | blob | history
releases/tdc_v2.1.2/Readout.vhd diff | blob | history
releases/tdc_v2.1.2/tdc_components.vhd diff | blob | history
releases/tdc_v2.1.2/tdc_constraints_64.lpf diff | blob | history
releases/tdc_v2.1.2/trb3_periph_32PinAddOn.vhd diff | blob | history
releases/tdc_v2.1.2/trb3_periph_ADA.vhd diff | blob | history
releases/tdc_v2.1.2/trb3_periph_gpin.vhd diff | blob | history
releases/tdc_v2.1.2/trb3_periph_padiwa.vhd diff | blob | history
releases/tdc_v2.1.2/unimportant_lines_constraints.lpf diff | blob | history
The FPGA-TDC files