]> jspc29.x-matter.uni-frankfurt.de Git - dirich.git/commit
Use raw clock rather than 200 MHz output from PLL
authorJan Michel <j.michel@gsi.de>
Tue, 18 Jul 2017 16:42:29 +0000 (18:42 +0200)
committerJan Michel <j.michel@gsi.de>
Tue, 18 Jul 2017 16:44:30 +0000 (18:44 +0200)
commita9cbe588d627e726f273846b5042cf694286267f
tree398f012a85efbebae64c4d27159a7634c2533b5e
parent1346a9647f50d1233a6572809ecf371d0b973486
Use raw clock rather than 200 MHz output from PLL
code/clock_reset_handler.vhd
combiner/par.p2t