jspc29.x-matter.uni-frankfurt.de Git

]> jspc29.x-matter.uni-frankfurt.de Git - mdcoep.git/commit

author	hadeshyp <hadeshyp>
	Mon, 18 May 2009 16:00:14 +0000 (16:00 +0000)
committer	hadeshyp <hadeshyp>
	Mon, 18 May 2009 16:00:14 +0000 (16:00 +0000)
commit	aee44370c4d8c90ae3878d98cb1c98c4eeb758a4
tree	a9857c34f7a8554712d909bfd672d5dce0358938	tree \| snapshot
parent	309d4a2ca6e66ecf0106f58231986390d02a861c	commit \| diff

initial 3

20 files changed:

design/common_stop_generator.vhd	[moved from common_stop_generator.vhd with 100% similarity]	blob \| history
design/counter_12bit.vhd	[moved from counter_12bit.vhd with 100% similarity]	blob \| history
design/counter_4bit.vhd	[moved from counter_4bit.vhd with 100% similarity]	blob \| history
design/counter_8bit.vhd	[moved from counter_8bit.vhd with 100% similarity]	blob \| history
design/edge_to_pulse.vhd	[moved from edge_to_pulse.vhd with 100% similarity]	blob \| history
design/fifo_8192depth_36width_dual_thresh.vhd	[moved from fifo_8192depth_36width_dual_thresh.vhd with 100% similarity]	blob \| history
design/fifo_fall_through_512depth_52width.vhd	[moved from fifo_fall_through_512depth_52width.vhd with 100% similarity]	blob \| history
design/initialization_RAM.vhd	[moved from initialization_RAM.vhd with 100% similarity]	blob \| history
design/load_ROC1_tdc_setup.vhd	[moved from load_ROC1_tdc_setup.vhd with 100% similarity]	blob \| history
design/load_mode_line.vhd	[moved from load_mode_line.vhd with 100% similarity]	blob \| history
design/mdc_addon_daq_bus_0.vhd	[moved from mdc_addon_daq_bus_0.vhd with 100% similarity]	blob \| history
design/mode_line_multiplexer.vhd	[moved from mode_line_multiplexer.vhd with 100% similarity]	blob \| history
design/pulse_to_constant.vhd	[moved from pulse_to_constant.vhd with 100% similarity]	blob \| history
design/send_token_to_mb.vhd	[moved from send_token_to_mb.vhd with 100% similarity]	blob \| history
design/tdc_interface_trb.vhd	[moved from tdc_interface_trb.vhd with 100% similarity]	blob \| history
design/tdc_readout.vhd	[moved from tdc_readout.vhd with 100% similarity]	blob \| history
design/tdc_readout_and_trb_interface.vhd	[moved from tdc_readout_and_trb_interface.vhd with 100% similarity]	blob \| history
design/trigger_begrun_state.vhd	[moved from trigger_begrun_state.vhd with 100% similarity]	blob \| history
design/trigger_distributor.vhd	[moved from trigger_distributor.vhd with 100% similarity]	blob \| history
design/trigger_handle_tld.vhd	[moved from trigger_handle_tld.vhd with 100% similarity]	blob \| history

MDC Optical Endpoint VHDL

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