]> jspc29.x-matter.uni-frankfurt.de Git - trb3.git/commit
jspc29 / trb3.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 964a968) | patch
CBMNet readout: Debug-Design for Periph-FPGA with Test-Pattern generator. Simulation...
authorManuel Penschuck <manuel.penschuck@stud.uni-frankfurt.de>
Tue, 5 Aug 2014 18:08:35 +0000 (20:08 +0200)
committerManuel Penschuck <manuel.penschuck@stud.uni-frankfurt.de>
Tue, 5 Aug 2014 18:08:35 +0000 (20:08 +0200)
commitb5780b2d8466f34bcecf81c62186e3b27521b046
treec8776888d7095ec33ad4ad3e491f3f8207924993tree | snapshot
parent964a9685604b52f3a2032a039b33b41524ad3c53commit | diff
CBMNet readout: Debug-Design for Periph-FPGA with Test-Pattern generator. Simulation proven. Scripts to verify data received by FLIB. Seems to work fine as long as there's no back-pressure
16 files changed:
cbmnet/code/cbmnet_readout.vhd diff | blob | history
cbmnet/code/cbmnet_readout_event_packer.vhd diff | blob | history
cbmnet/code/cbmnet_readout_fifo.vhd diff | blob | history
cbmnet/code/cbmnet_readout_trbnet_decoder.vhd diff | blob | history
cbmnet/code/cbmnet_readout_tx_fsm.vhd diff | blob | history
cbmnet/code/tb_cbmnet_logger.vhd [new file with mode: 0644] blob
cbmnet/code/tb_cbmnet_readout.vhd diff | blob | history
cbmnet/code/tb_cbmnet_readout2.vhd [new file with mode: 0644] blob
cbmnet/code/tb_cbmnet_readout_trbnet_decoder.vhd diff | blob | history
cbmnet/compile_constraints.pl diff | blob | history
cbmnet/compile_periph_frankfurt.pl diff | blob | history
cbmnet/test/check_frames.pl [new file with mode: 0755] blob
cbmnet/trb3_periph_cbmnet.lpf [new file with mode: 0644] blob
cbmnet/trb3_periph_cbmnet.prj diff | blob | history
cbmnet/trb3_periph_cbmnet.vhd diff | blob | history
cbmnet/trb3_periph_cbmnet_constraints.lpf diff | blob | history
TRB3 VHDL