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hub_test: Clean up IP cores and build results
authorThomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
Wed, 17 Mar 2021 16:17:32 +0000 (17:17 +0100)
committerThomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
Wed, 17 Mar 2021 18:34:51 +0000 (19:34 +0100)
commitbb1f161a1d6770937cc54e81b4450f23d7c9e462
tree0ef6d3d6af178abe7381c6f2c4eb07a00fea4913tree | snapshot
parentf2f0cb255334c8821bd80914cc9dc9917447892fcommit | diff
hub_test: Clean up IP cores and build results

- Remove XML files, which are apparently not required
- Set build directory for each core
- Add build directories and other files to gitignore file
- Set XCI options that are otherwise set during build
hub_test/.gitignore diff | blob | history
hub_test/ip/clk_wiz_0/clk_wiz_0.xci diff | blob | history
hub_test/ip/clk_wiz_0/clk_wiz_0.xml [deleted file] blob | history
hub_test/ip/clk_wiz_1/clk_wiz_1.xci diff | blob | history
hub_test/ip/clk_wiz_1/clk_wiz_1.xml [deleted file] blob | history
hub_test/ip/vio_0/vio_0.xci diff | blob | history
hub_test/ip/vio_0/vio_0.xml [deleted file] blob | history
VHDL modules for TrbNet on CBM Xilinx hardware