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(parent: 2b6a420) | patch
timing constraints for unimportant data lines is seperated from tdc placement constraints
authorCahit <c.ugur@gsi.de>
Tue, 22 Apr 2014 12:58:05 +0000 (14:58 +0200)
committerCahit <c.ugur@gsi.de>
Tue, 22 Apr 2014 12:58:05 +0000 (14:58 +0200)
commitc0a9661e29830e6b2c2429566a56de5fc9accbf9
treeeaaf4bd40790e59e223b9bd41a35568e244a32fbtree | snapshot
parent2b6a420e3090c5a016c74d881957b6c6cfdde6a2commit | diff
timing constraints for unimportant data lines is seperated from tdc placement constraints
tdc_releases/tdc_v1.6/tdc_constraints_64.lpf diff | blob | history
TRB3 VHDL