jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commit

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(parent: c5bf8de) | patch

author	hadeshyp <hadeshyp>
	Mon, 25 Feb 2008 12:39:31 +0000 (12:39 +0000)
committer	hadeshyp <hadeshyp>
	Mon, 25 Feb 2008 12:39:31 +0000 (12:39 +0000)
commit	d1013c00e1e3641c339087ef57ccd3410d82de0d
tree	366e12d7bbf3f0d9e66b5d70ae5ba162f78f71a0	tree \| snapshot
parent	c5bf8dedc786e3408191b2ded318ede3d57da0e0	commit \| diff

new fifo version, Jan

19 files changed:

testbench/trb_net16_dummy_passive_apl.vhd		diff \| blob \| history
trb_net16_api_base.vhd		diff \| blob \| history
xilinx/trb_net_fifo_16bit_bram_dualport_arch.vhd		diff \| blob \| history
xilinx/virtex2/simulation/xilinx_fifo_18x1k.vhd		diff \| blob \| history
xilinx/virtex2/simulation/xilinx_fifo_dualport_18x1k.vhd		diff \| blob \| history
xilinx/virtex2/usage.txt	[new file with mode: 0644]	blob
xilinx/virtex2/xilinx_fifo_18x1k.ngc	[new file with mode: 0644]	blob
xilinx/virtex2/xilinx_fifo_18x1k.xco		diff \| blob \| history
xilinx/virtex2/xilinx_fifo_dualport_18x1k.ngc	[new file with mode: 0644]	blob
xilinx/virtex2/xilinx_fifo_dualport_18x1k.xco		diff \| blob \| history
xilinx/virtex4/simulation/xilinx_fifo_18x1k.vhd		diff \| blob \| history
xilinx/virtex4/simulation/xilinx_fifo_dualport_18x1k.vhd		diff \| blob \| history
xilinx/virtex4/trb_net16_fifo_arch.vhd		diff \| blob \| history
xilinx/virtex4/usage.txt	[new file with mode: 0644]	blob
xilinx/virtex4/xilinx_fifo_18x1k.ngc	[new file with mode: 0644]	blob
xilinx/virtex4/xilinx_fifo_18x1k.xco		diff \| blob \| history
xilinx/virtex4/xilinx_fifo_dualport_18x1k.ngc	[new file with mode: 0644]	blob
xilinx/virtex4/xilinx_fifo_dualport_18x1k.xco		diff \| blob \| history
xilinx/virtex4/xilinx_fifo_dualport_18x1k_4.xco	[deleted file]	blob \| history

TrbNet VHDL code