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(parent: 0b1f1a7) | patch
hub_test: Add timing constraints
authorThomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
Wed, 30 Sep 2020 10:18:41 +0000 (12:18 +0200)
committerThomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
Mon, 12 Oct 2020 12:30:38 +0000 (14:30 +0200)
commite7de0b649fa24fb5e228d594e983bdc0b695d047
treeed6ba78151c6d839dfdef7516c4224123eb055b4tree | snapshot
parent0b1f1a7444b42f69bdb9e94b635c1df587378f4fcommit | diff
hub_test: Add timing constraints

Currently requires the sync_fix branch of trbnet to achieve timing
closure.
hub_test/constrs/hub_test.xdc diff | blob | history
hub_test/constrs/pulse_sync.xdc [new file with mode: 0644] blob
hub_test/constrs/signal_sync.xdc [new file with mode: 0644] blob
hub_test/constrs/trb_net_reset_handler.xdc [new file with mode: 0644] blob
hub_test/hub_test.xpr diff | blob | history
VHDL modules for TrbNet on CBM Xilinx hardware