XCKU MGTs: Add TX PI, BUFSTATUS, optional soft rst

XCKU MGTs: Add TX PI, BUFSTATUS, optional soft rst

The TX phase interpolator (PI) ports can be used to adjust the TX-data
phase with respect to the reference (and user) clock to achieve
deterministic latency.

The FIFO half full flag can be used to detect the phase between user
clock and XCLK as with the CERN HTPD TX phase aligner:

https://gitlab.cern.ch/HPTD/tx_phase_aligner

(cherry picked from commits
f9ed402b9d8ec37aa3df5d548f1c719ebbf08a75,
55d4774406b555cf9b1665ac97232877d379e92c,
17dd888de508b1e1b274422b0f6ac3559091c89e,
77e7dbe9d0a711f10f97c67384ea5295c18ef327)