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(parent: 717c920) | patch
added FIFOs for ecp3
authorCahit <c.ugur@gsi.de>
Fri, 17 Apr 2015 09:34:19 +0000 (11:34 +0200)
committerCahit <c.ugur@gsi.de>
Fri, 17 Apr 2015 09:34:19 +0000 (11:34 +0200)
commitf9fb953e9478c8918696249f34ff870770f22cbb
tree8b72d61c57cb5e291fa768b81d0b8eadb2ff9de3tree | snapshot
parent717c920a479fbcf00c5559332d76b353534e1377commit | diff
added FIFOs for ecp3
53 files changed:
base/cores/ecp3/FIFO/FIFO_36x32_OutReg.edn [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x32_OutReg.ipx [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x32_OutReg.jhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x32_OutReg.lpc [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x32_OutReg.sort [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x32_OutReg.srp [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x32_OutReg.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x32_OutReg_generate.log [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x32_OutReg_tmpl.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x64_OutReg.edn [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x64_OutReg.ipx [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x64_OutReg.jhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x64_OutReg.lpc [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x64_OutReg.sort [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x64_OutReg.srp [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x64_OutReg.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x64_OutReg_generate.log [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_36x64_OutReg_tmpl.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x128_OutReg.edn [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x128_OutReg.ipx [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x128_OutReg.jhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x128_OutReg.lpc [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x128_OutReg.sort [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x128_OutReg.srp [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x128_OutReg.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x128_OutReg_generate.log [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x128_OutReg_tmpl.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x32_OutReg.edn [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x32_OutReg.ipx [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x32_OutReg.jhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x32_OutReg.lpc [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x32_OutReg.sort [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x32_OutReg.srp [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x32_OutReg.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x32_OutReg_generate.log [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x32_OutReg_tmpl.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x64_OutReg.edn [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x64_OutReg.ipx [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x64_OutReg.jhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x64_OutReg.lpc [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x64_OutReg.sort [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x64_OutReg.srp [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x64_OutReg.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x64_OutReg_generate.log [new file with mode: 0644] blob
base/cores/ecp3/FIFO/FIFO_DC_36x64_OutReg_tmpl.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/generate_core.tcl diff | blob | history
base/cores/ecp3/FIFO/generate_ngd.tcl diff | blob | history
base/cores/ecp3/FIFO/msg_file.log diff | blob | history
base/cores/ecp3/FIFO/tb_FIFO_36x32_OutReg_tmpl.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/tb_FIFO_36x64_OutReg_tmpl.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/tb_FIFO_DC_36x128_OutReg_tmpl.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/tb_FIFO_DC_36x32_OutReg_tmpl.vhd [new file with mode: 0644] blob
base/cores/ecp3/FIFO/tb_FIFO_DC_36x64_OutReg_tmpl.vhd [new file with mode: 0644] blob
The FPGA-TDC files