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(parent: bd5ed2a) | patch
SERDES cores and entity for 240MHz connection of ECP5 (tested on TRB5sc)
authorAdrian Weber <adrian.a.weber@exp2.physik.uni-giessen.de>
Wed, 4 May 2022 11:53:33 +0000 (13:53 +0200)
committerAdrian Weber <adrian.a.weber@exp2.physik.uni-giessen.de>
Wed, 4 May 2022 11:53:33 +0000 (13:53 +0200)
commitbc8080e5d350846232c2b7e191dad273fba0640f
tree4964ffd0ed559696005535317315ba1100820e1btree | snapshot
parentbd5ed2ac12ae1a8e829666f47b4743bb5dd3ede0commit | diff
SERDES cores and entity for 240MHz connection of ECP5 (tested on TRB5sc)
20 files changed:
media_interfaces/ecp5/240MHz/chan0_0/serdes_sync_0.lpc [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan0_0/serdes_sync_0.ngd [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan0_0/serdes_sync_0.ngo [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan0_0/serdes_sync_0.vhd [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan0_0/serdes_sync_0_ngd.asd [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan0_1/serdes_sync_0.lpc [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan0_1/serdes_sync_0.ngd [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan0_1/serdes_sync_0.ngo [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan0_1/serdes_sync_0.vhd [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan0_1/serdes_sync_0_ngd.asd [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan1_0/serdes_sync_2.lpc [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan1_0/serdes_sync_2.ngd [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan1_0/serdes_sync_2.ngo [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan1_0/serdes_sync_2.vhd [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/chan1_0/serdes_sync_2_ngd.asd [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/pcs2_240.vhd [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/pcs_240.vhd [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/serdes_sync_0_softlogic.v [new file with mode: 0644] blob
media_interfaces/ecp5/240MHz/serdes_sync_2_softlogic.v [new file with mode: 0644] blob
media_interfaces/med_ecp5_sfp_sync_240.vhd [new file with mode: 0644] blob
TrbNet VHDL code