fixed reset in reset_handler

diff --git a/code/clock_reset_handler.vhd b/code/clock_reset_handler.vhd
index 4f504b27f990ae28b86d06e02882222e7a9bf7f0..6ad71bd16061a2a2b676f7c9f269f12db66f5ac4 100644 (file)
--- a/code/clock_reset_handler.vhd
+++ b/code/clock_reset_handler.vhd
@@ -49,6 +49,7 @@ signal clock_select  : std_logic := '0';
 
 signal timer   : unsigned(15 downto 0) := (others => '0');
 signal clear_n_i : std_logic := '0';
+signal reset_i   : std_logic;
 
 attribute syn_keep of clear_n_i     : signal is true;
 attribute syn_preserve of clear_n_i : signal is true;
@@ -200,10 +201,11 @@ THE_RESET_HANDLER : trb_net_reset_handler
     RESET_IN        => '0',             -- general reset signal (SYSCLK)
     TRB_RESET_IN    => RESET_FROM_NET,  -- TRBnet reset signal (SYSCLK)
     CLEAR_OUT       => CLEAR_OUT,       -- async reset out, USE WITH CARE!
-    RESET_OUT       => RESET_OUT,       -- synchronous reset out (SYSCLK)
+    RESET_OUT       => reset_i,       -- synchronous reset out (SYSCLK)
     DEBUG_OUT       => open
   );  
 
+RESET_OUT <= reset_i;
   
   
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