*** empty log message ***

diff --git a/daqnet.kilepr b/daqnet.kilepr
index 245ab3b98a9c7c96a40c70c3935c0aa1af69a199..493b0bd845f0017b707cd8d827e788a6b418e2ed 100755 (executable)
--- a/daqnet.kilepr
+++ b/daqnet.kilepr
@@ -3,7 +3,7 @@ img_extIsRegExp=false
 img_extensions=.eps .jpg .jpeg .png .pdf .ps .fig .gif
 kileprversion=2
 kileversion=2.0
-lastDocument=main.tex
+lastDocument=lvl1trigger.tex
 masterDocument=main.tex
 name=daqnet
 pkg_extIsRegExp=false
@@ -42,6 +42,24 @@ line=0
 open=false
 order=-1
 
+[item:commonfeatures.tex]
+archive=true
+column=17
+encoding=ISO 8859-15
+highlight=LaTeX
+line=6
+open=true
+order=15
+
+[item:daqnet.kilepr]
+archive=true
+column=1769099307
+encoding=
+highlight=
+line=0
+open=false
+order=-1
+
 [item:daqstartup.tex]
 archive=true
 column=16
@@ -62,7 +80,7 @@ order=11
 
 [item:gbe.tex]
 archive=true
-column=191
+column=192
 encoding=ISO 8859-15
 highlight=LaTeX
 line=30
@@ -71,7 +89,7 @@ order=12
 
 [item:hubs.tex]
 archive=true
-column=91
+column=58
 encoding=
 highlight=LaTeX
 line=65
@@ -80,28 +98,28 @@ order=6
 
 [item:ipudataformat.tex]
 archive=true
-column=25
+column=151
 encoding=UTF-8
 highlight=LaTeX
-line=204
+line=256
 open=true
 order=1
 
 [item:lvl1trigger.tex]
 archive=true
-column=157
+column=114
 encoding=UTF-8
 highlight=LaTeX
-line=39
+line=114
 open=true
 order=2
 
 [item:main.tex]
 archive=true
-column=10
+column=21
 encoding=UTF-8
 highlight=LaTeX
-line=101
+line=58
 open=true
 order=0
 

diff --git a/evtbuild.tex b/evtbuild.tex
index e599f4e233750d3807127c5047f32219ce75400f..cb96b55f1394b27acdc935d6fc646b95f2d46fa2 100644 (file)
--- a/evtbuild.tex
+++ b/evtbuild.tex
@@ -14,7 +14,7 @@ The daq\_evtbuild and daq\_netmem can be configured in three ways:
 
 daq\_evetbuild must be executed before daq\_netmem (as daq\_evtbuild is the one who opens buffers in shared memory).
 
-\subsubsection{daq\_evtbuild options}
+\subsection{daq\_evtbuild options}
 daq\_evtbuild can be executed with the following options: 
 
 \begin{description}
@@ -85,7 +85,7 @@ To support data writing to multiple disks the dedicated daq\_disk server runs on
 The other important script cleanup.pl is aimed to clean up disks when they get occupide up to 90\%.
 Both processes are executed in the background at boot time.
 
-\subsubsection{daq\_netmem options}
+\subsection{daq\_netmem options}
 daq\_netmem can be executed with the following options: 
 
 \begin{description}
@@ -103,7 +103,7 @@ daq\_netmem can be executed with the following options:
 \end{description}
 \end{description}
 
-\subsubsection{Starting Event Builders}
+\subsection{Starting Event Builders}
 
 Communication (synchronization, RUN Id distribution and monitoring) between parallel Event Builders is based on the Input/Output Controller (IOC) processes running on each EB server. 
 Parallel Event Builders can be started from lxhadesdaq by /home/hadaq/trbsoft/daq/evtbuild/start\_eb\_gbe.pl.
@@ -135,7 +135,7 @@ The script reads several configuration files.
 \end{description}
 \end{description}
 
-\subsubsection{Monitoring Event Builders}
+\subsection{Monitoring Event Builders}
 
 As has been already said the monitoring of EBs is based on the IOC processes running on each EB server.
 
@@ -150,7 +150,7 @@ Before starting the monitoring one should set two env variables:
 The monitoring can be started by executing: 
 lxhadesdaq: /home/scs/Desktop/DAQ/EB\_Monitor.desktop
 
-\subsubsection{Monitoring Event Builder's Logs}
+\subsection{Monitoring Event Builder's Logs}
 
 To learn more details about the running Event Builders on can look at
 the output of the monitoring stript which scans the log files of all the
@@ -169,7 +169,7 @@ lxhadesdaq: /home/hadaq/Desktop/DAQ/EBLog\_Watch.desktop
 
 \section{Storing data to Oracle database}
 
-\subsubsection{Time stamp and current info on boards}
+\subsection{Time stamp and current info on boards}
 
 The DAQ startup script writes the ascii file with all the active boards in the system and the time stamp. 
 The daq2ora\_client.pl script reads this ascii file on lxhadesdaq (/home/hadaq/\-oper/daq2ora/\-daq2ora\_2010-08-30\_12.49.50.txt) and stores the info in the Oracle database. The info consists of board unique Id, TRB-Net address, subEvent Id, TDC RC Mode, threshold version for RICH and MDC as well as MDC TDC mask version.
@@ -192,7 +192,7 @@ The daq2ora\_client.pl script reads this ascii file on lxhadesdaq (/home/hadaq/\
 \end{description}
 \end{description}
 
-\subsubsection{RUN Start/Stop info}
+\subsection{RUN Start/Stop info}
 
 The event builder writes the data at RUN start and RUN stop to the ascii file (for example /home/hadaq/\-oper/oper\_1/\-eb\_runinfo2ora\_1.txt is the file on lxhadesdaq writen by event builder 1 running on lxhadeb01. lxhadesdaq mounts /home/hadaq/oper/oper\_1/ from lxhadeb01). The runinfo2ora.pl script reads the files and writes the data in the Oracle database.
 \newline

diff --git a/hubs.tex b/hubs.tex
index 9fc50f104236bfbc02403c6be6487dc5ccb7be4d..05214de4b68a1bb39ec5f7d6cf5497718d4a85e6 100755 (executable)
--- a/hubs.tex
+++ b/hubs.tex
@@ -57,7 +57,8 @@ $\dagger$: Register is not reset during network reset
 \begin{description}
  \item[0xC0 - 0xC3: Port Switch] One register for each TrbNet channel. Each bit controls one port. 1: port is switched on (default). 0: port is switched off.
  \item[0xC4: Port Disable] One bit for each port. Each bit controls one port. 1: port is powered down. 0: port is switched on (default).
- \item[0xC5: Timeouts] Configure duration of timeout for each channel. Each hex digit controls one channel. 0xF switches off timeouts, values 0x0 - 0x7 set timeout to $2^{(2 \cdot value+1)}$ms (2,8,32,128ms;1,4,16,64s). Default is 0x106F (8ms on slow control, 1s on IPU, off on LVL1).
+ \item[0xC5: Timeouts] Configure duration of timeout for each channel. Each hex digit controls one channel. 0xF switches off timeouts, values 0x0 - 0xE set timeout to $2^{(2 \cdot value+1)}$ms (2,8,32,128ms;1,4,16,64s). Default is 0x50FF.\\
+ New version: $2^{value+1}$ms (2,4,8,16,32,64,128,256,512ms;1,2,4,8,16,32s;off). Default is 0x90FF (1s on slow control, off on IPU and LVL1).
  \item[0xC6: Network Reset] One bit for each port. Sends a network reset to the selected ports. 1: send network reset on port, 0: normal operation. Has to be cleared by user.
  \item[0xC7: Link Lookup] One bit for each port. If bit is set, the corresponding link LED (usually green) will flash (approx. 8 Hz, 25\% off time).
 \end{description}

diff --git a/installation_ethernet_table.tex b/installation_ethernet_table.tex
index 91b2b61041cc3eb6ef84d19570784732f904cbe0..ba0c61b5c17c4dacdb8a86c0ddc3cc2af1f4684e 100644 (file)
--- a/installation_ethernet_table.tex
+++ b/installation_ethernet_table.tex
@@ -1,39 +1,39 @@
-\begin{longtable}{|l|l|X|}
+\begin{longtable}{|p{0.1\textwidth}|X|p{0.6\textwidth}|}
 \hline
 \textbf{Switch} & \textbf{Position} & \textbf{Connection} \\
 \hline\hline
-1  & SHW-rack         & Longshine LCS-GS9240 \newline
+1\newline hadsw01  & SHW-rack         & Longshine LCS-GS9240 \newline
                         Port 1: white switch for RPC Power Supplies on top of SHW-Rack \newline 
                         Port 9: Uplink 05P-17 \newline
                         Port A: Shower Hub \newline
                         Port C: Shower sector 2 \newline
                         Port D: Shower sector 1 \\
 \hline
-2  & SHW-rack         & Longshine LCS-GS9240 \newline
+2\newline hadsw06  & SHW-rack         & Longshine LCS-GS9240 \newline
                         Port 9: Uplink 05P-18 \newline
                         Port 12: Switch rear right corner of mainframe (Shower/RPC TRBs)
                         Port C: Shower sector 4 \newline
                         Port D: Shower sector 3 \\
 \hline
-3  & SHW-rack         & Longshine LCS-GS9240 \newline
+3\newline hadsw05  & SHW-rack         & Longshine LCS-GS9240 \newline
                         Port 9: Uplink 05P-19 \newline
                         Port 1: Switch 22 (TOF Rack) \newline
                         Port C: Shower sector 4 \newline
                         Port D: Shower sector 3 \\
 \hline
-4  & SHW-rack         & Longshine LCS-GS9240 \newline
+4\newline hadsw02  & SHW-rack         & Longshine LCS-GS9240 \newline
                         Port 1: TOF-HV crate switch (underneath PC) \newline
                         Port 9: Uplink 05Q-18 \newline
                         Port C: RPC sector 4,5,6 \newline
                         Port D: RPC sector 1,2,3 \\
 \hline
-5  & rear right corner& Netgear 24 port \newline
+5\newline hadswXX  & rear right corner& Longshine LCS-GS9240 \newline
                         2 links to both RPC hub TRB \newline
                         1 link to Shower hub TRB \newline
                         6 links to all RPC/Shower sector hubs \newline
                         1 Uplink to switch 2 \\
 \hline
-6  & front rack       & Longshine LCS-GS9240 \newline
+6\newline hadsw08  & front rack       & Longshine LCS-GS9240 \newline
                         Port 1: white switch 16 on MDC1/2 platform \newline
                         Port 2: white switch on platform between MDC1/2 and CTS \newline
                         Port 3: Switch 14/15 on front right corner (TOF and MDC3/4 hubs and TRB) \newline
@@ -41,30 +41,30 @@
                         Port C: MDC 1/2 Hub 2 (address 1010) \newline
                         Port D: MDC 1/2 Hub 1 (address 1000) \\
 \hline
-7  & front rack       & Longshine LCS-GS9240 \newline
+7\newline hadsw09  & front rack       & Longshine LCS-GS9240 \newline
                         Port 8: Uplink 01C-06 \newline
                         Port C: MDC 1/2 Hub 4 (address 1030) \newline
                         Port D: MDC 1/2 Hub 3 (address 1020) \\
 \hline
-8  & front rack       & Longshine LCS-GS9240 \newline
+8\newline hadsw11  & front rack       & Longshine LCS-GS9240 \newline
                         Port 8: Uplink 01C-08 \newline
                         Port C: MDC 3/4 Hub 2 (address 1110) \newline
                         Port D: MDC 3/4 Hub 1 (address 1100) \\
 
 \hline
-9  & front rack       & Longshine LCS-GS9240 \newline
+9\newline hadsw12  & front rack       & Longshine LCS-GS9240 \newline
                         Port 8: Uplink 05Q-20 \newline
                         Port C: MDC 3/4 Hub 4 (address 1130) \newline
                         Port D: MDC 3/4 Hub 3 (address 1120) \\
 \hline
-10 & front rack       & Netgear 12 port \newline
+10\newline hadsw03 & front rack       & Netgear 12 port \newline
                         Port 1: Uplink 01C-02 \newline
-                        Port 9: MDC1/2 Hub TRB \newline
-                        Port 10: MDC3/4 Hub TRB \newline
+                        Port 9: MDC1/2 Hub \newline
+                        Port 10: MDC3/4 Hub \newline
                         Port 11: MDC3/4 Hub 5 (address 1140) \newline
                         Port 12: MDC 3/4 Hub 6 (address 1150) \\
 \hline
-11 & front rack       & Netgear 12 port \newline
+11\newline hadsw04 & front rack       & Netgear 12 port \newline
                         Port 1: Uplink 05Q-16 \newline
                         Port 7: Forward wall switch \newline
                         Port 9: Hub Start/Veto/CTS \newline
@@ -80,11 +80,6 @@
                         Start TRB \newline
                         Switch 12 (MDC power supplies) \\
 \hline
-14/15 & front right corner  & 2x Netgear 8 port \newline
-                           Uplink via switch 11 \newline 
-                           TOF TRB \newline
-                           Hub TOF, Hub MDC 3/4 \\
-\hline
 16 & MDC1/2 platform  & Netgear 8 port \newline
                          MDC 1/2 hub \newline
                          RICH hubs\\
@@ -96,13 +91,13 @@
 18 & front left corner & Netgear 8 port \newline
                           uplink via switch 14/15\\
 \hline
-19 & forward wall     & Longshine LCS-GS9240 \newline
+19\newline hadsw07 & forward wall     & Longshine LCS-GS9240 \newline
                          Uplink via switch 11 \newline
                          3 links to FW TRB \newline
                          2 links to FW power supplies \newline
                          \\
 \hline
-20 & front rack       & Longshine LCS-GS9240 \newline
+20\newline hadsw10 & front rack       & Longshine LCS-GS9240 \newline
                          Port 8: uplink 05Q-19 \newline 
                          Port C: MDC 1/2 sector 6 \newline
                          Port D: MDC 1/2 sector 5\\
@@ -121,6 +116,11 @@
                           4 links to TRB \newline
                           1/2 links to Hadcon \\
 \hline
+32 & front right corner  & Longshine LCS-GS9240 \newline
+                           Uplink via switch 11 \newline 
+                           TOF TRB \newline
+                           Hub TOF, Hub MDC 3/4 \\
+
 \caption{Position and usage of GbE switches}
 \label{NetworkSwitch}
 \end{longtable}

diff --git a/networkaddresses.tex b/networkaddresses.tex
index ae33bdc6df270c652917c8567e8d5915eabd99c2..fec62c0c96a4036de0634bc40c6f21bcdbb31c27 100755 (executable)
--- a/networkaddresses.tex
+++ b/networkaddresses.tex
@@ -8,13 +8,11 @@ On boards with two or more FPGAs each FPGA gets its own address. The FPGA provid
 
 \begin{table}[hb]
 \begin{center}
-\begin{tabularx}{\textwidth}{|l|l|X|}
-\hline
+\begin{tabularx}{\textwidth}{l|l|X}
 \textbf{Address(es)} & \textbf{Board(s)} & \textbf{Description} \\
-\hline\hline
 0000 - 00FF & CTS & \\
 0100 - 01FF & Slow Control & \\
-0200 - 02FF & Other CTS-like boards & \\
+0200 - 02FF & Other CTS-like boards \\
 1000 - 17FF & MDC Concentrator & 2nd digit: inner(0) / outer(1) MDC; 3rd digit: sector (0-5), 4th digit FPGA (0-4) \\
 2000 - 2FFF & MDC OEP & 2nd digit: MDC layer (0-3); 3rd digit: sector (0-5); 4th digit MBO (0-F) \\
 3000 - 31FF & RICH ADCM & 3rd digit: sector (0-5); 4th digit: segment (0-4) \\
@@ -34,9 +32,8 @@ On boards with two or more FPGAs each FPGA gets its own address. The FPGA provid
 8700 - 87FF & Forward Wall Hub & \\
 8800 - 88FF & Start/Veto/CTS Hub & \\
 F000 - FDFF & Test Setups & \\
-FE00 - FEFF & Special Broadcast & Special broadcast addresses to access groups of boards. See table \ref{HardwareInformation} for details. \\
-FF00 - FFFF & Broadcasts & \\
-\hline
+FE00 - FEFF & Reserved & Reserved for extension of broadcast addresses \\
+FF00 - FFFF & Broadcasts &
 \end{tabularx}
 \caption{Network Addresses}
 \label{networkaddresses}

diff --git a/trigger.tex b/trigger.tex
index 813d2f454597c548f9f01428e746f521cfd92df0..6ca1a3153514d0e01ca44485849695a9c903e84a 100644 (file)
--- a/trigger.tex
+++ b/trigger.tex
@@ -5,7 +5,9 @@ Trigger cables to TOF and MDC3/4 as well as RPC, Shower and Forward Wall are tra
 
 From the rear right corner there is a 20m Cat6 Ethernet cable (delay 105 ns) going to each sector of Shower and RPC plus two pais of twisted pair cable (80 ns delay) to Forward Wall. Veto and MDC1/2 are using twisted pair cables directly from the CTS using LVDS. RICH has a Cat7 Ethernet cables with all four wire pairs connecting CTS and RICH. 
 
-The delay of standard Ethernet cables has been measured to be 5.17 ns/m. The full setup is shown in figure \ref{trigger_cables}.
+The delay of standard Ethernet cables has been measured to be 5.17 ns/m. The full setup is shown in figures \ref{trigger_cables} and \ref{trigger_to_cts}.
+
+The inputs to the central base line restorer boards are: First six inputs are the signals from all six TOF sectors, the other two lines on the first set of inputs are free. On the second half of inputs, port 1 to 5 and 7 are used for the six signals from RPC sectors.
 
 \begin{figure}
   \centering
@@ -13,3 +15,9 @@ The delay of standard Ethernet cables has been measured to be 5.17 ns/m. The ful
   \caption{Trigger Cables between CTS and detectors. Black times are delay requirements, red times are measured latencies.}
   \label{trigger_cables}
 \end{figure}
+\begin{figure}
+  \centering
+  \includegraphics[width=.9\textheight,angle=90]{trigger_to_cts.pdf}
+  \caption{Trigger Cables between detectors and CTS.}
+  \label{trigger_to_cts}
+\end{figure}
\ No newline at end of file

diff --git a/trigger_to_cts.pdf b/trigger_to_cts.pdf
new file mode 100644 (file)
index 0000000..4656282
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