# Currently 92 (maximum allowed: 100)
The TRB3 features four FPGA-based TDCs with <20ps RMS time precision
-between two channels and 256+4 channels in total. One central FPGA
+between two channels and 256+4+4 channels in total. One central FPGA
provides flexible trigger functionality and GbE connectivity including
powerful slow control. We present recent users' applications of this
platform following the COME&KISS principle: Successful test beamtimes
discriminators with a PWM generated voltage as a variable threshold.
However, for calorimeters the charge information of the pulse
extracted from time over threshold is usually not sufficient. Thus,
-the leading edge measurement can complemented by a modified Wilkinson
+the leading edge measurement can be complemented by a modified Wilkinson
ADC circuit, which encodes the charge in the width of the digital
pulse delivered to the TDC. A proof-of-concept board was successfully
tested and a version with an improved dynamic range is currently