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\T1/ptm/m/n/10.95 par-ti-cle de-tec-tors. This CMOS-process pro-vides the high-
resistivity epi-tax-ial layer dis-cussed above.
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[]\T1/ptm/b/n/10 Figure 8. \T1/ptm/m/n/10 Noise and gain of the pixel P2 of
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\newcommand{\mus}{~\rm \upmu s}
\newcommand{\mum}{~\rm \upmu m}
E-mail: \email{doering@physik.uni-frankfurt.de}}
-\abstract{CMOS Monolithic Active Pixel Sensors (MAPS) have demonstrated excellent performance as tracking detectors for charged particles. They provide an outstanding spatial resolution (a few $\rm \mu m$), a detection efficiency of $ \gtrsim 99.9\%$, very low material budget ($0.05\%~\rm X_0$) and good radiation tolerance ($\gtrsim 1 \Mrad$, $\gtrsim 10^{14} \neqcm$) \cite{RESMDD2012}. This makes them an interesting technology for various applications in heavy ion and particle physics.\newline
-For the vertex detectors of CBM and ALICE, we are aiming to develop large scale sensors with an integration time of $30\mus$. Reaching this goal is eased by features available in CMOS-processes with $0.18\mum$ feature size. To exploit this option, some sensor designs have been migrated from the previously used $0.35\mum$ processes to this novel process. We report about our first findings with the devices obtained with a focus on noise and the tolerance to ionizing radiation.}
+\abstract{CMOS Monolithic Active Pixel Sensors (MAPS) have demonstrated excellent performance as tracking detectors for charged particles. They provide an outstanding spatial resolution (a few $\rm \mu m$), a detection efficiency of $ \gtrsim 99.9\%$, very low material budget ($0.05\%~\rm X_0$) and good radiation tolerance ($\gtrsim 1 \Mrad$, $\gtrsim 10^{14} \neqcm$) \cite{RESMDD2012}. This recommends them as an interesting technology for various applications in heavy ion and particle physics.\newline
+For the vertex detectors of CBM and ALICE, we are aiming at developping large scale sensors with an integration time of $30\mus$. Reaching this goal is eased by features available in CMOS-processes with $0.18\mum$ feature size. To exploit this option, some sensor designs have been migrated from the previously used $0.35\mum$ processes to this novel process. We report about our first findings with the devices obtained with a focus on noise and the tolerance to ionizing radiation.}
\keywords{ Radiation-hard detectors; Particle tracking detectors (solid-state detectors); Monolithic pixel detectors; CMOS-sensors; Monolithic active pixel sensors; Radiation damage}
CMOS Monolithic Active Pixel Sensors (MAPS) found numerous applications in the field of heavy ion physics and particle physics. They are being installed in the STAR Heavy Flavor Tracker \cite{RHIC} and will be used in the Micro Vertex Detector of the future Compressed Baryonic Matter (CBM) experiment \cite{Vertex08}. Moreover, their use is considered for the vertex detectors of the International Linear Collider (ILC) \cite{ILC} and the upgrade of the ALICE-ITS \cite{Musa}. The expected integrated radiation doses in these applications range from several $10^{10}\neqcm$ and few $100~\rm krad$ (ILC) to \mbox{$\gtrsim 10^{13} \neqcm $} and $\gtrsim 1\Mrad$ (CBM).
-MAPS integrate their sensitive volume and the pixel readout electronic on one chip, which is produced with commercially available CMOS processes. As shown in figure \ref{fig:mapssensor}, the sensitive epitaxial layer is surrounded by two layers made from P++ doped silicon. N doped implantations in one P++ doped layer form a P$_{\rm Epi~ Layer}$/N$_{\rm Well}$-diode. Signal electrons, generated by impinging particles, travel in the epitaxial layer and are reflected back at its interfaces to the surrounding layers until they are collected by a diode. The details of the charge collection process depend significantly on the doping of the epitaxial layer. In case this volume is made from the moderately doped ($\sim 10~\rm \Omega \cdot cm$) silicon as found in standard CMOS processes, the charge collection is dominated by thermal diffusion. Significant improvements can be reached by exploiting the lower doping ($\sim 1~\rm k\Omega \cdot cm$) to CMOS-processes dedicated to commercial optical imaging devices. In this case, the sensitive volume is partially depleted, which accelerates the charge collection and improves substantially the tolerance of MAPS to non-ionizing radiation damage. After this improvement, the tolerance of MAPS to bulk damage was extended to $\gtrsim 10^{14}~\rm n_{eq}/cm^2$ \cite{RESMDD2012,Mi25}. Consequently, their tolerance to non-ionizing radiation dose currently outshine the ionizing radiation tolerance. Therefore, the life-time of MAPS in vertex detectors is limited by the effects of surface damage.\newline
+MAPS integrate their sensitive volume and the pixel readout electronic on one chip, which is produced with commercially available CMOS processes. As shown in figure \ref{fig:mapssensor}, the sensitive epitaxial layer is surrounded by two layers made from P++ doped silicon. N doped implantations in one P++ doped layer form a P$_{\rm Epi~ Layer}$/N$_{\rm Well}$-diode. Signal electrons, generated by impinging particles, travel in the epitaxial layer and are reflected back at its interfaces to the surrounding layers until they are collected by a diode. The details of the charge collection process depend significantly on the doping of the epitaxial layer. In case this volume is made from the moderately doped ($\sim 10~\rm \Omega \cdot cm$) silicon as found in standard CMOS processes, the charge collection is dominated by thermal diffusion. Significant improvements can be reached by exploiting the lower doping ($\sim 1~\rm k\Omega \cdot cm$) to CMOS-processes dedicated to commercial optical imaging devices. In this case, the sensitive volume is partially depleted, which accelerates the charge collection and hence improves substantially the tolerance of MAPS to non-ionizing radiation damage. After this improvement, the tolerance of MAPS to bulk damage was extended to $\gtrsim 10^{14}~\rm n_{eq}/cm^2$ \cite{RESMDD2012,Mi25}. Consequently, their tolerance to non-ionizing radiation dose currently outshine the ionizing radiation tolerance. Therefore, the life-time of MAPS in vertex detectors is limited by the effects of surface damage.\newline
\begin{figure}
\begin{minipage}{8cm}
\caption{Cross sectional view of a CMOS sensor. The trajectory of an impinging particle (single-pointed arrow) and the diffusion paths of diffusing free electrons are shown.}
\end{minipage}
\end{figure}
-Since recently, a dedicated imaging process with $0.18~\rm \upmu m$ feature size became available for particle detectors. This CMOS-process provides the high-resistivity epitaxial layer discussed above. Moreover, it features deep P- and N-wells, which allows conceptually for using full CMOS also in the pixel area\footnote{Without this feature, the N-well implantation required for building PMOS-transistors would act as parasitic collection diode and therefore destroy the sensing abilities of the pixel.}, which is helpful for improving the readout speed of the device. Finally, CMOS-processes with a smaller feature size are known for providing an improved tolerance to ionizing radiation. In order to exploit those features, we aim to migrate our successful sensor designs to this new CMOS-process.
+Since recently, a dedicated imaging process with $0.18~\rm \upmu m$ feature size became available for particle detectors. This CMOS-process provides the high-resistivity epitaxial layer discussed above. Moreover, it features deep P- and N-wells, which allows conceptually for using full CMOS also in the pixel area\footnote{Without this feature, the N-well implantation required for building PMOS-transistors would act as parasitic collection diode and therefore destroy the sensing abilities of the pixel.}, which is helpful for improving the readout speed of the device. Finally, CMOS-processes with a smaller feature size are known for providing an improved tolerance to ionizing radiation. In order to exploit those features, we aim at migrating our successful sensor designs to this new CMOS-process.
\section{Sensor design}
-In a first step, some exploratory devices were designed to study the properties of sensing nodes integrated in the novel CMOS process. The chips were named MIMOSA-32, MIMOSA-32ter and MIMOSA-34. Each of those chips host matrices with 32 different pixels types, which vary in terms of pixel pitch, as well as in the sensing node and preamplifier layouts. The 1024 pixels of each pixel matrix are arranged in 16 columns with 64 pixels per column. The columns are readout in parallel and their signal is sent to 16 external ADCs\footnote{Only 8 out of 16 columns were read out due to the limited number of ADCs available in IKF readout system. This restriction remains without impact on the conclusions of our study.}. The readout time is $32~ \rm \upmu s$, which represents the design goal of the future sensors for CBM and ALICE.
+Some exploratory devices were designed to study the properties of sensing nodes integrated in the novel CMOS process. The chips were named MIMOSA-32, MIMOSA-32ter and MIMOSA-34. Each of those chips host matrices with 32 different pixels types, which vary in terms of pixel pitch, as well as in the sensing node and preamplifier layouts. The 1024 pixels of each pixel matrix are arranged in 16 columns with 64 pixels per column. The columns are readout in parallel and their signal is sent to 16 external ADCs\footnote{Only 8 out of 16 columns were read out due to the limited number of ADCs available in the used readout system. This restriction remains without impact on the conclusions of our study.}. The readout time is $32~ \rm \upmu s$, which represents the design goal of the future sensors for CBM and ALICE.
In the pixels discussed in the following, the charge collected by the P$_{\rm Epi~ Layer}$/N$_{\rm Well}$-diode is stored in the parasitic capacitance C of the sensing node and hereafter buffered by means of a source follower (see figure \ref{fig:preamplifier}). The signal charge as well as the accumulated charge generated by the leakage current of the collection diode is cleared by means of a continuous bias, which is realized with a permanently opened reset switch based on a NMOS transistor (labeled reset-transistor in figure \ref{fig:preamplifier}). In this particular mode of operation, the switch should act as a high resistivity forward biased diode and the pixel should be equivalent to the self-bias pixels discussed in \cite{Deveaux2010428}.
-The charge-to-voltage amplification gain of our CMOS-pixels depends predominantly on the size of the parasitic capacitance of the sensing node. Contributors to this parasitic capacitance are in particular the P$_{\rm Epi~ Layer}$/N$_{\rm Well}$-junction, the drain of the reset transistor and the gate of the source follower transistor. The smaller feature size of the $0.18~\rm \upmu m$-process allows for reducing the size and such the capacitance of those structures, which turns into a sizable potential for improving the amplification gain of the pixel. However, reducing the diode size may come with drawbacks in terms of charge collection efficiency and reducing the size of the transistor gates was reported to cause significant 1/f- and RTS-noise in MAPS used for optical imaging \cite{RTS0.18,RTS0.182}.
+The charge-to-voltage amplification gain of CMOS-pixels depends predominantly on the size of the parasitic capacitance of the sensing node. Contributors to this parasitic capacitance are in particular the P$_{\rm Epi~ Layer}$/N$_{\rm Well}$-junction, the drain of the reset transistor and the gate of the source follower transistor. The smaller feature size of the $0.18~\rm \upmu m$-process allows for reducing the size and such the capacitance of those structures, which turns into a sizable potential for improving the amplification gain of the pixel. However, reducing the diode size may come with drawbacks in terms of charge collection efficiency and reducing the size of the transistor gates was reported to cause significant 1/f- and RTS-noise in MAPS used for optical imaging \cite{RTS0.18,RTS0.182}.
\begin{figure}
\begin{minipage}[t]{8cm}
\includegraphics[width=8cm]{schaltplanpreampf3T.pdf}
-\caption{A 3T preamplifier with continuous bias.}
+\caption{A 3T preamplifier with continuous bias}
\label{fig:preamplifier}
\end{minipage}
\hspace{0.2cm}
\begin{minipage}[t]{8cm}
\includegraphics[width=8cm]{Mi18Mi32Noisevergleich.pdf}
-\caption{Noise distribution}
+\caption{Noise distribution. Mind the different choosen bin size.}
\label{fig:Mi18Mi32Mi34Noisevergleich}
\end{minipage}
\end{figure}
-In order to find the optimal compromise between the different parameters, we compared the noise performances of different pixels. A first comparison was made between the pixels labeled as Pixel A to C in Table \ref{tab:Mi32-1-f-noise-table}. Those pixels host an identical sensing diode with a size of $\sim 11 \rm \upmu m^2$, an identical reset transistor but the layout of the source follower transistor was varied as listed in the table. As a benchmark, we use Pixel R, a well performing pixel manufactured in a high-resistivity $0.35~\rm \upmu m$-process\footnote{From MIMOSA-18AHR, see \cite{RESMDD2012} for further information.}.
+In order to find the optimal compromise between the different parameters, we compared the noise performances of different pixels. A first comparison was made between the pixels labeled as Pixel A to C in Table \ref{tab:Mi32-1-f-noise-table}. Those pixels host an identical sensing diode with a size of $\sim 11 \rm \upmu m^2$, an identical reset transistor but the layout of the source follower transistor was varied as listed in the table. As a benchmark, we use Pixel R, a well performing matrix manufactured in a high-resistivity $0.35~\rm \upmu m$-process\footnote{From MIMOSA-18AHR, see \cite{RESMDD2012} for further information.}.
\begin{table}[tbp]
\centering
Mi-32ter-P6& B & 0.9 & 0.2 & 1.97 & 10.5 & 20.5 & 55\\
Mi-32ter-P5& C & 0.5 & 0.2 & 2.09 & 10.1 & 21.3 & 63\\
Mi-34-P17 & D & 1.5 & 0.2 & 2.83 & 5.8 & 16.2 & 38\\
-Mi-18AHR-A2 ($0.35~\upmu \rm m$)&R & ELT& 0.35 & 1.71 & 6.0 & 10.7 & 18\\
+Mi-18AHR-A2 ($0.35~\upmu \rm m$)&R & - & 0.35 & 1.71 & 6.0 & 10.7 & 18\\
\hline
Difference A$\rightarrow$C & & & & +15\% & +10\% & +8\% & +54\%\\
\hline
\end{tabular}
-\caption{Noise and gain in dependence of the source follower gate size. The uncertainties of the absolute measurements are 5\% for the gain and 10\% for the median noise. The diode size of all pixels listed is $11~\rm \upmu m^2$. The width of the gate of all reset transistors is $0.25~\rm \upmu m$ and the length is $0.20~\rm \upmu m$ (pixel A-C) and $0.30~\rm \upmu m$ (pixel D). The source follower transistor of pixel R has an enclosed layout. Note that the gain includes the gain of the external readout chain. Therefore, only the gain of pixels of the same chip can be compared.}
+\caption{Noise and gain in dependence of the source follower gate size. The uncertainties of the absolute measurements are 5\% for the gain and 10\% for the median noise. The diode size of all pixels listed is $11~\rm \upmu m^2$. The width of the gate of all reset transistors is $0.25~\rm \upmu m$ and the length is $0.20~\rm \upmu m$ (pixel A-C) and $0.30~\rm \upmu m$ (pixel D). The source follower transistor of pixel R has an enclosed layout. Note, the gain includes the gain of the external readout chain. Therefore, only the gain of pixels of the same chip can be compared.}
\label{tab:Mi32-1-f-noise-table}
\end{table}
-According to our measurement standard, we defined the noise as the standard deviation of the dark signal of the individual pixel after performing correlated double sampling, pedestal correction and common mode correction. Details on the related measurement procedure were discussed in \cite{Dev07}. The noise of a pixel matrix is defined as the median of the noise of all individual pixels of this matrix and was measured at a temperature of $T=+20\rm^{\circ}C$. Typically the number of $\lesssim 1\%$ "noisy" pixel could be tolerated. Therefore, in the following, we evaluate not only the median value of the pixel noise distribution but also the noise limit so that $\gtrsim99\%$ of the pixels have a lower noise.
+According to our measurement standard, we defined the noise as the standard deviation of the dark signal of the individual pixel after performing correlated double sampling, pedestal correction and common mode correction. Details on the related measurement procedure were discussed in \cite{Dev07}. The noise of a pixel matrix is defined as the median of the noise of all individual pixels of this matrix and was measured at a temperature of $T=+20\rm^{\circ}C$. Typically the number of $\lesssim 1\%$ "noisy" pixels could be tolerated. Therefore, in the following, we evaluate not only the median value of the pixel noise distribution but also the noise limit so that $\gtrsim99\%$ of the pixels have a lower noise. We translate this value to the signal to noise to receive a lower limit also for the signal to noise. $\gtrsim99\%$ of the pixels have a better signal to noise ratio, which should exceed 15 for a reliable MIP-detection. \newline
\subsection{Impact of the transistor layout on the noise}
Figure \ref{fig:Mi18Mi32Mi34Noisevergleich} compares the performances of the \mbox{Pixel A} ($0.18\rm ~\upmu m$, biggest source follower transistor gate) with the one of the established \mbox{Pixel R} \mbox{($0.35\rm ~\upmu m$ feature} size). \mbox{Pixel R} shows a small distribution with a median noise of $10.7 \rm \e$, and $\gtrsim 99\%$ of all pixels indicate a noise below $18 \rm \e$. The noise of \mbox{Pixel A} follows a broad distribution with a median of $19.8\rm \e$ and $\gtrsim 99\%$ of all pixels remain below a noise of $41\rm \e$. Based on the results for Pixel A-C, one may state that reducing the surface of the gate of the source follower transistor increases slightly the gain of the pixel. However, the median noise does also slightly increase, mostly because more pixels with very high individual noise are observed in the presence of a small gate: Once the width of the gate is reduced from $1.5 \mum$ to $0.5 \mum$, the ``99\%-noise'' raises from 41 to 63 electrons.
-This unintuitive finding can be understood by studying the detailed properties of noise pixels and comparing the results with the observations reported in \cite{RTS0.18,RTS0.182}. As shown in \mbox{figure \ref{fig:Mi32-1-f-noise-CDS-Signal}} and in \mbox{figure \ref{fig:Mi32-1-f-noise-Distribution}}, one observes that the dark signal after CDS of a representative noisy pixel varies between three well defined levels. This signature is the origin of the high noise. The observation is compatible with the presence a Random Telegraph Signal in the source follower transistor. Random Telegraph Signal is most likely caused by individual defects in the silicon, which may absorb or emit an individual electron. The field of this electron adds to the field applied to the gate of the FET. Therefore, the current passing the FET is modulated to two well separated levels depending on the charge state of the defect. As we apply correlated double sample, which means subtracting the values of two consecutive samples, we observe three levels representing a stable state, the absorption, and the emission of an electron in the defect during the integration time.
+This unintuitive finding can be understood by studying the detailed properties of noise pixels and comparing the results with the observations reported in \cite{RTS0.18,RTS0.182}. As shown in \mbox{figure \ref{fig:Mi32-1-f-noise-CDS-Signal}} and in \mbox{figure \ref{fig:Mi32-1-f-noise-Distribution}}, one observes that the dark signal after CDS of a representative noisy pixel varies between three well defined levels. This signature is the origin of the high noise. The observation is compatible with the presence a Random Telegraph Signal in the source follower transistor. Random Telegraph Signal is most likely caused by individual defects in the silicon, which may absorb or emit an individual electron. The field of this electron adds to the field applied to the gate of the FET. Therefore, the current passing the FET is modulated to two well separated levels depending on the charge state of the defect. As we apply correlated double sampling, which means subtracting the values of two consecutive frames, we observe three levels representing a stable state, the absorption, and the emission of an electron in the defect during the integration time.
\begin{figure}
\begin{minipage}[t]{0.49 \textwidth}
\includegraphics[width=\textwidth]{Mi32-1-f-noise-CDS-Signal.pdf}
-\caption{CDS-Signal of a selected "noisy" pixel.}
+\caption{CDS-Signal of a selected "noisy" pixel}
\label{fig:Mi32-1-f-noise-CDS-Signal}
\end{minipage}
\hspace{0.02 \textwidth}
\begin{minipage}[t]{0.49 \textwidth}
\includegraphics[width=\textwidth]{Mi32-1-f-noise-Distribution.pdf}
-\caption{Histogram of the CDS-Signal of the selected noisy pixel}
+\caption{Distribution of the CDS-Signal of the selected "noisy" pixel}
\label{fig:Mi32-1-f-noise-Distribution}
\end{minipage}
\newline
\end{minipage}
\end{figure}
This RTS dominates the usual pixel noise, which determines the width of the individual peaks. Increasing the transistor gate surface seems to reduce the relative impact of the RTS and is therefore found to be beneficial. This holds also for the gate of the reset transistor, which was enlarged in \mbox{Pixel D}. After this modification, the median noise was reduced from \mbox{$19.8~\rm e$} \mbox{(Pixel A)} to \mbox{$16.2~\rm e$} \mbox{(Pixel D)}.
-Note that, while enlarging the transistor size reduces the RTS, cooling seems not to show a positive impact. This stands in contrast to our observations on RTS-noise originating from the pixel \mbox{diodes \cite{RTS}}.
+Note that, while enlarging the transistor size reduces the RTS, cooling seems not to show a positive impact. This is in contrast to our observations on RTS-noise originating from the pixel \mbox{diodes \cite{RTS}}.
\subsection{Impact of the transistor layout on the sensor performance}
The relation between the charge collection efficiency (CCE), the gain and the median noise of the pixels was measured with MIMOSA-34. All pixels were derived from pixel D and the diode size was varied. Figure \ref{fig:Diodesurface} shows the noise and the gain of the different pixels. Moreover, the CCE representing the most probable fraction of charge collected by the seed pixel of a pixel cluster is shown. For the CCE, only the matrices with the same pitch of $22\mum\times 33\mum$ are comparable. The CCE was measured by means of a $^{55}$Fe-source.
-One observes that the gain is strongly reduced with increasing diode size and the capacitive noise of the pixels raises accordingly. However, this effect comes with an increase in terms of charge collection efficiency, which raises the signal. This is shown in figure \ref{fig:StoNDiodeSize}, which shows the noise, the most probable signal and the S/N as recorded once the sensor was illuminated by $\upbeta$-rays from a $^{90}$Sr-source. One observes that the S/N, which is defined as the most probable signal in the seed pixel divided by the median of the noise distribution, is in the order of 50. Once propagating the ``99\%-noise'' to the S/N, one finds that 99\% of all pixels exceeds 22 and no significant impact of the diode pitch is observed. Note that this S/N is sufficient for reliable MIP-detection and remains fairly above the average S/N of our early successful prototypes like MIMOSA-2.
-
-%TEST
-%\section{Experimental setup}
-
-%To demonstrate the benefits of this technology, first prototype sensors named MIMOSA-32, MIMOSA-32ter and MIMOSA-34 were produced. They provide each 32 different pixel matrices to study different pixel and amplifier layouts. The 512 pixels of a matrix are arranged in eight columns with 64 pixels per column. The integration time is $32\mus$, which represents the design goal of the CBM and ALICE sensor MISTRAL. The sensors were manufactured also with a high-resistivity epitaxial layer up to a resistivity of $6~\rm k\Omega cm$ to preserve and extend the benefits in terms of non-ionizing radiation hardness \cite{RESMDD2012}. \newline
-%The samples were irradiated at CERN with X-rays of a dose of up to $10\Mrad$. During the X-ray irradiation, they were powered. The dosimetry was carried out by the staff of the facility and is considered to have a $10\%$ absolute precision. Afterward, the irradiated sensors were bonded on a proximity board and operated in a climatized dark chamber. \newline
-%The sensors were illuminated with $5.9~\rm keV$ X-rays from an ${\rm^{55}Fe}$-source and hard $\beta$-rays from a $\rm ^{90}Sr$-source. Both measurements are complementary as the X-rays deposit $\sim 1640\e$ in a point-like volume while the $\beta$-rays distribute a signal charge similar to the one of minimum ionizing particles along the particle trajectory. The response of pixels to the particles was recorded and a signal amplitude spectrum was built as described in \cite{Dev07}. The signal amplitude spectrum of an ${\rm^{55}Fe}$-source has a characteristic calibration peak, when the photon converts in the depleted volume of the diode. This can be used for gain estimation as this signal amplitude corresponds to $1640\e$.
-
-%To estimate the noise, we compute the signal fluctuations of each individual pixel. The median of the related distribution will be referred to "measured noise". The ENC can be calculated by equation \ref{eq:noise}. Once operating the non-irradiated sensors, one observes an increased noise of around $20\e$ (matrix MIMOSA-32ter-P2 in $0.18\mum$ process) in comparison to $12\e$ in previous sensors in $0.35\mum$ process (matrix MIMOSA-18AHR-A2) (see figure \ref{fig:Mi18Mi32Mi34Noisevergleich}). $\gtrsim 99\%$ of the pixels of MIMOSA-18-AHR-A2 have a noise $\lesssim 19.2\e$, however the same percent of pixels of MIMOSA-32ter-P2 have a noise $\lesssim 36.6\e$. Therefore, not only the mean noise is higher, but also the noise pixel distribution is more inhomogeneous. The question is, what is the origin of that noise and how one can suppress it.\newline
-
-%One idea is to shorten the transistor gate size to improve the gain and therefore decrease the noise. However, a 1/f noise contribution from the source follower was observed in \cite{RTS0.18,RTS0.182} to be a dominant source for very small transistors. The same signature is observed in figure \ref{fig:Mi32-1-f-noise-CDS-Signal} which shows the CDS signal of a chosen "noisy" pixel. Looking at the histogram (figure \ref{fig:Mi32-1-f-noise-Distribution}) one can more clearly see the three states. Remarkable is, that this measurement was done at the very low temperature of $T=-35\C$, which suppresses thermal and diode RTS noise \cite{RTS}, but obviously not the 1/f noise.\newline
-
-%\begin{equation}
-% ENC~[e]=\frac{Measured~noise~[mV]}{Gain~[mV/e]}
-% \label{eq:noise}
-%\end{equation}
-%Typically the number of $\lesssim 1\%$ "noisy" pixel could be tolerated. Therefore, in the following, we evaluate not only the median value of the pixel noise distribution but also the noise limit so that $\gtrsim99\%$ of the pixels have a lower $noise.\newline
-%\newline
-
-%\begin{table}[tbp]
-%
-%\centering
-%\begin{tabular}{|ll|c|}
-%\hline
-%Feature size & Matrix & $\gtrsim99\%$ of the pixels have a noise \\
-%\hline
-%$0.35\mum$ & MIMOSA-18AHR-A2 & $\lesssim19.2\e$\\
-%$0.18\mum$ & MIMOSA-32ter-P2 & $\lesssim36.6\e$\\
-%$0.18\mum$ & MIMOSA-34-P1 & $\lesssim26.3\e$\\
-%\hline
-%\end{tabular}
-%\caption{Estimation of the pixel noise spread }
-%\label{tab:Mi32-1-f-pixel}
-%\end{table}
-
+One observes that the gain is strongly reduced with increasing diode size and the capacitive noise of the pixels raises accordingly. However, this effect comes with an increase in terms of charge collection efficiency, which raises the signal. This is shown in figure \ref{fig:StoNDiodeSize}, which shows the noise, the most probable signal and the S/N as recorded once the sensor was illuminated by $\upbeta$-rays from a $^{90}$Sr-source. One observes that the S/N, which is defined as the most probable signal in the seed pixel divided by the median of the noise distribution, is in the order of 50. Once propagating the ``99\%-noise'' to the S/N, one finds that 99\% of all pixels exceeds 22 and no significant impact of the diode pitch is observed. Note that this S/N is sufficient for reliable MIP-detection and remains fairly above the average S/N of the early successful prototypes like MIMOSA-2.
\section{Radiation tolerance}
-The next step we studied the performances of irradiated sensors. In a first exploratory study, we irradiated some MIMOSA-32 sensors at CERN with X-rays of a dose of up to $10\Mrad$ and tested them hereafter. The dosimetry was carried out by the staff of the facility and is considered to have a $10\%$ absolute precision and the sensors were powered during irradiation. The sensors were operated at $T=+20\C$. The tests were carried out with a number of different pixel designs showing similar behavior. The preliminary results of one pixel type are shown.
+In the next step, we studied the performances of irradiated sensors. In a first exploratory study, we irradiated some MIMOSA-32 sensors at CERN with X-rays of a dose of up to $10\Mrad$ and tested them hereafter. The dosimetry was carried out by the staff of the facility and is considered to have a $10\%$ absolute precision and the sensors were powered during irradiation. The sensors were operated at $T=+20\C$. The tests were carried out with a number of different pixel designs showing similar behavior. The preliminary results of one pixel type are shown in the following.
-After an irradiation dose of up to $3\Mrad$, we do not observe significant changes in the pixel performance. After a dose of $10\Mrad$, the gain of the sensor dropped by a factor of two (figure \ref{fig:10MradNoiseGain}). The origin of this effect is under investigation. Despite the drop, the sensor remained operational and the median noise increased only moderately from $\sim 20\rm \e$ to $\sim 25\rm \e$.
-Evaluating the signal to noise ratio of the pixels by means of $\upbeta$-rays of a $^{90}$Sr-source, one observes a good median signal to noise ratio of 42, which drops to 33 due to the noise increase (figure \ref{fig:10MradStoN}). Accounting for the width of the distribution, the radiation effect becomes small: 99\% of all pixels show a satisfactory S/N above 20 before and above 17 after irradiation. Again, the noise appears to be dominated by RTS-noise and a solid quantitative understanding of the radiation effects on the noise might require sensors, which are optimized for low RTS. However, the results provide an encouraging first evidence that the manufacturing process and our sensor concept is suited to reach the ambitioned tolerance to some $\rm Mrad$.
+After an irradiation dose of up to $3\Mrad$, we do not observe significant changes in the pixel performance. After a dose of $10\Mrad$, the gain of the sensor dropped by a factor of two (figure \ref{fig:10MradNoiseGain}). The origin of this effect is under investigation. Despite the drop, the sensor remained operational and the ENC increased only moderately from $\sim 20\rm \e$ to $\sim 25\rm \e$.
+Evaluating the signal to noise ratio of the pixels by means of $\upbeta$-rays of a $^{90}$Sr-source, one observes a good signal to noise ratio (median) of 42, which drops to 33 due to the noise increase (figure \ref{fig:10MradStoN}). Accounting for the width of the distribution, the radiation effect becomes small: 99\% of all pixels show a satisfactory S/N above 20 before and above 17 after irradiation. Again, the noise appears to be dominated by RTS-noise and a solid quantitative understanding of the radiation effects on the noise might require sensors, which are optimized for low RTS. However, the results provide an encouraging first evidence that the manufacturing process and our sensor concept is suited to reach the ambitioned tolerance to some $\rm Mrad$.
\begin{figure}
\begin{minipage}{0.49\textwidth}
\includegraphics[width=\textwidth]{10MradNoiseGain.pdf}
-\caption{Noise and gain of the pixel P2 of MIMOSA-32 as function fo the radiation dose.}
+\caption{Noise and gain of the pixel P2 of MIMOSA-32 as function of the radiation dose}
\label{fig:10MradNoiseGain}
\end{minipage}
\hspace{0.02 \textwidth}
\begin{minipage}{0.49\textwidth}
\includegraphics[width=\textwidth]{10MradStoN.pdf}
-\caption{S/N of the pixel P2 of MIMOSA-32 as function of the radiation dose (see text).}
+\caption{S/N of the pixel P2 of MIMOSA-32 as function of the radiation dose (see text)}
\label{fig:10MradStoN}
\end{minipage}
\end{figure}
-%For older sensors in $0.35\mum$ process, there was a runaway of the transistor working point observed due to built-on charges. The sensors could not be readout after an irradiation dose of $\gtrsim 1\Mrad$. In the $0.18\mum$ process, the $SiO_2$ is thinner and therefore accumulated charge should escape via tunnel effect more easily. This can be confirmed by MIMOSA-32. The reference voltage is much more stable and even a sensor irradiated up to $10\Mrad$ can be operated without any adjustment.
-
-%Irradiating MIMOSA-32 with an integration time of $32\mus$ to an ionizing radiation dose of up to $10\Mrad$, one observes no dramatic changes up to $3\Mrad$ and a noise increase to $25\e$ after $10\Mrad$ (figure \ref{fig:10MradNoiseGain}). ENC noise in [e] increases while the measured noise in [mV] decreases due to a gain drop of 1/2. Operating at room temperature is still possible and it is not required to cool the sensors to suppress the shot noise. Evaluating the signal to noise ratio with a beta source, one observes a good signal to noise ratio of 42 which drops to 33 due to the noise increase (figure \ref{fig:10MradStoN}). The error bar represents a lower limit. $\gtrsim 99\%$ of the pixels have a better signal to noise ratio. Therefore even after an ionizing radiation dose of $10\Mrad$, $\gtrsim 99\%$ of the pixels have a still sufficient signal to noise ratio of 17. The signal collection is as expected not affected by the ionizing radiation damage. Regarding the signal amplitude one profit here from the high-resistivity epitaxial layer which doubles the signal amplitude in comparison to low-resistivity sensors \cite{RESMDD2012}. Therefore the noise increase to $25\e$ does not hamper as before.
-
-
-
-%Once operating the non-irradiated sensors, one observes an increased noise of around $20\e$ (matrix MIMOSA-32ter-P2 in $0.18\mum$ process) in comparison to $12\e$ in previous sensors in $0.35\mum$ process (matrix MIMOSA-18AHR-A2) (see figure \ref{fig:Mi18Mi32Mi34Noisevergleich}). $\gtrsim 99\%$ of the pixels of MIMOSA-18-AHR-A2 have a noise $\lesssim 19.2\e$, however the same percent of pixels of MIMOSA-32ter-P2 have a noise $\lesssim 36.6\e$. Therefore, not only the mean noise is higher, but also the noise pixel distribution is more inhomogeneous. The question is, what is the origin of that noise and how one can suppress it.\newline
-
-%One idea is to shorten the transistor gate size to improve the gain and therefore decrease the noise. However, a 1/f noise contribution from the source follower was observed in \cite{RTS0.18,RTS0.182} to be a dominant source for very small transistors. The same signature is observed in figure \ref{fig:Mi32-1-f-noise-CDS-Signal} which shows the CDS signal of a chosen "noisy" pixel. Looking at the histogram (figure \ref{fig:Mi32-1-f-noise-Distribution}) one can more clearly see the three states. Remarkable is, that this measurement was done at the very low temperature of $T=-35\C$, which suppresses thermal and diode RTS noise \cite{RTS}, but obviously not the 1/f noise.\newline
-
-%The question is, what is the optimum transistor gate size which allows for maximum gain and minimum 1/f noise. To test this three different matrices of MIMOSA-32ter with a varying source follower gate width were designed and studied. The measurement results in table \ref{tab:Mi32-1-f-noise-table} show the gain indeed increases by $10\%$. However, due to the larger 1/f noise contribution the measured noise in units of mV raises by $25\%$ and therefore the resulting noise in units of ENC worsens by $20\%$. Therefore it was decided to use the large dimensions of MIMOSA-32ter-P2 in future sensors for the source follower. In addition, in next generation sensor MIMOSA-34, the length of the biasing transistor was increased from $0.2\mum$ to $0.3\mum$. Figure \ref{fig:Mi18Mi32Mi34Noisevergleich} shows that the maximum of the noise distribution of the matrix MIMOSA-34-P17 is around $17\e$ and therefore improved.\newline
-
-%Another influence is the surface size of the collecting diode. If the diode surface is small, the capacity is small and the gain is improved, which suppresses the noise. However a small diode surface hampers the charge collection because the probability that signal electrons hit the nearest diode is lower. Therefore one has to find a compromise between a large diode surface for an efficient charge collection and a small surface for an improved gain. MIMOSA-34 provides matrices with different diode surfaces (figure \ref{fig:Diodesurface}). The matrices P17, P20 and P23 only differ in the diode size, P19 and P27 differ also in the pixel pitch and in addition have some extra features but that should play a minor role here. As expected, the gain improves and the noise shrinks with a smaller diode surface. However, as expected, also the charge collection efficiency suffers. Therefore one has to find a compromise between that aspects. Figure \ref{fig:StoNDiodeSize} shows the signal, the noise and the corresponding signal to noise ratio as a function of the diode size for pixels with a pixel pitch of $22\mum \times 33\mum$. The signal amplitude increases more than the noise and therefore the signal to noise ratio is largest for the largest diode size of $11\mum$.\newline
-
-%All shown matrices of MIMOSA-32 and MIMOSA-32ter and MIMOSA-34-P17 have a diode surface of around $11\mum$. In contrast, MIMOSA-18AHR-A2, a sensor in the $0.35\mum$ process, has a larger surface of $15\mum$, but a better noise performance (figure \ref{fig:Diodesurface} open triangles). Therefore, here might be still room for noise improvements for sensors in the $0.18\mum$ process.\newline
-
-
-%The next step is to move to more complex circuits which are necessary to achieve long pixel columns. \newline
\section{Summary and conclusion}
-Aiming for applications like the vertex detectors of CBM and ALICE, we are developing radiation tolerant large scale sensors with an integration time of $\lesssim 30\mus$. A $0.18\mum$ CMOS process providing a high-resistivity epitaxial layer, deep P- and N-wells and potentially a high tolerance to ionizing radiation is considered as a well suited technology for manufacturing those sensors. The process was explored by means of sensor prototypes hosting numerous pixels, which were varied in different key parameters.
+Aiming at applications like the vertex detectors of CBM and ALICE, we are evaluating radiation tolerant large scale sensors with an integration time of $\lesssim 30\mus$. A $0.18\mum$ CMOS process providing a high-resistivity epitaxial layer, deep P- and N-wells and potentially a high tolerance to ionizing radiation is considered as a well suited technology for manufacturing those sensors. The process was explored by means of sensor prototypes hosting numerous pixels, which were varied in different key parameters.
Guided by observations made previously in the field of optical imaging, we studied the relation between sensor capacitance and the RTS - 1/f noise. We find that the use of sensor gates with a length close to the minimum feature size introduces significant RTS-noise into some of the pixels. As the moderate amount of noisy pixels determines the threshold settings on future particle sensor, the advantages of the small gates in terms of reduced capacitance and therefore the improved gain cannot be exploited. Concerning the optimal width of the sensing diode, we find that the increase of noise and of the CCE, which are caused by an increasing diode, do mostly cancel each other out and a very good S/N is reached with diode surfaces scaling from $2 \mum^2$ to $11 \mum^2$. %The use of bigger diodes appears slightly preferable.
jspc29 / radhard.git / commitdiff