adjust uart output driver

diff --git a/base/trb3_central_cts.lpf b/base/trb3_central_cts.lpf
index ef0c7105d616568d252bb288a4dd13053b69b55b..0c6ec467c66bfe48e1aa77a52117617d7d30cbd5 100644 (file)
--- a/base/trb3_central_cts.lpf
+++ b/base/trb3_central_cts.lpf
@@ -74,7 +74,7 @@ LOCATE COMP  "CLKRJ_1"   SITE "U8";
 LOCATE COMP  "CLKRJ_2"   SITE "Y34";
 LOCATE COMP  "CLKRJ_3"   SITE "Y33"; 
 DEFINE PORT GROUP "CLKRJ_group" "CLKRJ*" ;
-IOBUF GROUP  "CLKRJ_group" IO_TYPE=LVCMOS25 PULLMODE=NONE DRIVE=4;
+IOBUF GROUP  "CLKRJ_group" IO_TYPE=LVCMOS25 PULLMODE=UP DRIVE=12;
 
 #################################################################
 # Clock and Trigger Select