use work.trb_net_std.all;
use work.trb_net_components.all;
-use work.trb_net_gbe_components.all;
-use work.trb_net_gbe_protocols.all;
+--use work.trb_net_gbe_components.all;
+use work.gbe_protocols.all;
entity gbe_logic_wrapper is
generic(
signal mc_ip_proto : std_logic_vector(7 downto 0);
signal mc_ident : std_logic_vector(15 downto 0);
- signal dbg_select_rec : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- signal dbg_select_sent : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- signal dbg_select_rec_bytes : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- signal dbg_select_sent_bytes : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- signal dbg_select_drop_in : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- signal dbg_select_drop_out : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
signal dbg_select_gen : std_logic_vector(2 * c_MAX_PROTOCOLS * 32 - 1 downto 0);
- signal global_reset : std_logic;
- signal rst_n : std_logic;
- signal ff : std_logic;
+-- signal global_reset : std_logic;
+-- signal rst_n : std_logic;
+-- signal ff : std_logic;
signal link_ok : std_logic;
signal dhcp_done : std_logic;
signal monitor_tx_frames : std_logic_vector(31 downto 0);
signal monitor_dropped : std_logic_vector(31 downto 0);
- signal dbg_hist, dbg_hist2 : hist_array; -- TO BE CHECKED
signal make_reset : std_logic;
signal frame_pause : std_logic_vector(31 downto 0);
begin
- reset_sync : process(GSR_N, CLK_125_IN)
- begin
- if (GSR_N = '0') then
- ff <= '0';
- rst_n <= '0';
- elsif rising_edge(CLK_125_IN) then
- ff <= '1';
- rst_n <= ff;
- end if;
- end process reset_sync;
-
- global_reset <= not rst_n;
-
fc_ihl_version <= x"45";
fc_tos <= x"10";
fc_ttl <= x"ff";
DHCP_DONE_OUT <= dhcp_done;
- MAIN_CONTROL : entity work.trb_net16_gbe_main_control
+ MAIN_CONTROL: entity work.trb_net16_gbe_main_control
generic map(
- RX_PATH_ENABLE => 1,
- DO_SIMULATION => 0,
INCLUDE_SLOWCTRL => INCLUDE_SLOWCTRL,
INCLUDE_DHCP => INCLUDE_DHCP,
INCLUDE_ARP => INCLUDE_ARP,
CLK_125 => CLK_125_IN,
RESET => RESET,
MC_LINK_OK_OUT => link_ok,
- MC_RESET_LINK_IN => global_reset,
- MC_IDLE_TOO_LONG_OUT => open,
MC_DHCP_DONE_OUT => dhcp_done,
MY_IP_OUT => MY_IP_OUT,
MC_MY_MAC_IN => MY_MAC_IN,
DEBUG_OUT(31 downto 0) => DEBUG_OUT,
DEBUG_OUT(63 downto 32) => open,
--
- MONITOR_SELECT_REC_OUT => dbg_select_rec,
- MONITOR_SELECT_REC_BYTES_OUT => dbg_select_rec_bytes,
- MONITOR_SELECT_SENT_BYTES_OUT => dbg_select_sent_bytes,
- MONITOR_SELECT_SENT_OUT => dbg_select_sent,
- MONITOR_SELECT_DROP_IN_OUT => dbg_select_drop_in,
- MONITOR_SELECT_DROP_OUT_OUT => dbg_select_drop_out,
MONITOR_SELECT_GEN_DBG_OUT => dbg_select_gen,
- DATA_HIST_OUT => dbg_hist,
- SCTRL_HIST_OUT => dbg_hist2
+ SCTRL_HIST_OUT => open --dbg_hist2
);
MAKE_RESET_OUT <= make_reset;
- TRANSMIT_CONTROLLER : trb_net16_gbe_transmit_control2
+ TRANSMIT_CONTROLLER: entity trb_net16_gbe_transmit_control2
port map(
CLK => CLK_125_IN,
- RESET => global_reset, --RESET,
+ RESET => RESET, --global_reset,
-- signal to/from main controller
TC_DATAREADY_IN => mc_transmit_ctrl,
TC_RD_EN_OUT => mc_wr_en,
MONITOR_TX_PACKETS_OUT => monitor_tx_packets
);
- FRAME_CONSTRUCTOR : trb_net16_gbe_frame_constr
+ FRAME_CONSTRUCTOR: entity trb_net16_gbe_frame_constr
port map(
- RESET => global_reset,
+ RESET => RESET, --global_reset,
CLK => CLK_125_IN,
LINK_OK_IN => '1', -- BUG
WR_EN_IN => fc_wr_en,
-- frame_pause <= x"0000" & CFG_THROTTLE_PAUSE_IN; -- TAKE CARE!!!
frame_pause <= x"0000" & x"0000"; -- TAKE CARE!!!
- RECEIVE_CONTROLLER : trb_net16_gbe_receive_control
+ RECEIVE_CONTROLLER: entity trb_net16_gbe_receive_control
port map(
CLK => CLK_125_IN,
- RESET => global_reset,
+ RESET => RESET, --global_reset,
-- signals to/from frame_receiver
RC_DATA_IN => fr_q,
FR_RD_EN_OUT => fr_rd_en,
DEBUG_OUT => rc_debug
);
- FRAME_RECEIVER : trb_net16_gbe_frame_receiver
+ FRAME_RECEIVER: entity trb_net16_gbe_frame_receiver
port map(
CLK => CLK_125_IN,
- RESET => global_reset,
+ RESET => RESET, --global_reset,
LINK_OK_IN => link_ok,
ALLOW_RX_IN => CFG_ALLOW_RX_IN,
MY_MAC_IN => MY_MAC_IN,
--- /dev/null
+library ieee;
+use ieee.std_logic_1164.all;
+USE IEEE.numeric_std.ALL;
+USE IEEE.std_logic_UNSIGNED.ALL;
+
+package gbe_protocols is
+ type hist_array is array (31 downto 0) of std_logic_vector(31 downto 0);
+
+ -- number of "protocols" supported
+ constant c_MAX_PROTOCOLS : integer range 1 to 16 := 6;
+ -- READOUT, SLOWCTRL, PING, ARP, DHCP, FWD ???
+
+ constant c_MAX_FRAME_TYPES : integer range 1 to 16 := 2;
+ type frame_types_a is array (c_MAX_FRAME_TYPES - 1 downto 0) of std_logic_vector(15 downto 0);
+ constant FRAME_TYPES : frame_types_a := (x"0800", x"0806");
+ -- IPv4, ARP
+
+ constant c_MAX_IP_PROTOCOLS : integer range 1 to 16 := 2;
+ type ip_protos_a is array (c_MAX_IP_PROTOCOLS - 1 downto 0) of std_logic_vector(7 downto 0);
+ constant IP_PROTOCOLS : ip_protos_a := (x"11", x"01");
+ -- UDP, ICMP
+
+ -- this are the destination ports of the incoming packet
+ constant c_MAX_UDP_PROTOCOLS : integer range 1 to 16 := 4;
+ type udp_protos_a is array (c_MAX_UDP_PROTOCOLS - 1 downto 0) of std_logic_vector(15 downto 0);
+ constant UDP_PROTOCOLS : udp_protos_a := (x"0044", x"6590", x"7530", x"7531");
+ -- DHCP client, SCTRL, STATs
+
+end package;
use work.trb_net_std.all;
use work.trb_net_components.all;
-use work.trb_net_gbe_components.all;
-use work.trb_net_gbe_protocols.all;
+--use work.trb_net_gbe_components.all;
+use work.gbe_protocols.all;
entity gbe_wrapper_fifo is
generic(
);\r
end entity rx_rb;\r
\r
--- This entity acts as receiv buffer for the new GbE media interface. It connects to the MAC RX ports,\r
+-- This entity acts as receive buffer for the new GbE media interface. It connects to the MAC RX ports,\r
-- and is storing incoming Ethernet frames. \r
-- Broken frames (indicated by MAC_RX_ERROR_IN) are dropped, and in addition, frames which can't be stored\r
-- completely (due to potential ring buffer overflow) are also dropped.\r
library work;\r
use work.trb_net_std.all;\r
use work.trb_net_components.all;\r
-use work.trb_net16_hub_func.all;\r
-use work.trb_net_gbe_components.all;\r
-use work.trb_net_gbe_protocols.all;\r
+--use work.trb_net16_hub_func.all;\r
+--use work.trb_net_gbe_components.all;\r
+use work.gbe_protocols.all;\r
\r
--********\r
-- here all frame checking has to be done, if the frame fits into protocol standards\r
new_frame_lock <= '1';\r
else\r
new_frame <= '0';\r
--- new_frame_lock <= new_frame_lock;\r
end if;\r
end if;\r
end process THE_NEW_FRAME_PROC;\r
\r
-THE_FILTER_MACHINE_PROC: process( CLK )\r
+THE_FILTER_MACHINE_PROC: process( CLK, RESET )\r
begin\r
- if( rising_edge(CLK) ) then\r
- if( RESET = '1' ) then\r
- filter_current_state <= IDLE;\r
- else\r
- filter_current_state <= filter_next_state;\r
- end if;\r
+ if ( RESET = '1' ) then\r
+ filter_current_state <= IDLE;\r
+ elsif( rising_edge(CLK) ) then\r
+ filter_current_state <= filter_next_state;\r
end if;\r
end process THE_FILTER_MACHINE_PROC;\r
\r
remove_ctr <= (others => '1');\r
elsif( (MAC_RX_EN_IN = '1') and (filter_current_state /= IDLE) ) then\r
remove_ctr <= remove_ctr + 1;\r
--- else\r
--- remove_ctr <= remove_ctr;\r
end if;\r
end if;\r
end process REMOVE_CTR_PROC;\r
saved_proto <= (others => '0');\r
elsif( (filter_current_state = REMOVE_IP) and (remove_ctr = x"07") ) then\r
saved_proto <= MAC_RXD_IN;\r
--- else\r
--- saved_proto <= saved_proto;\r
end if;\r
end if;\r
end process THE_SAVED_PROTO_PROC;\r
saved_dest_mac(39 downto 32) <= MAC_RXD_IN;\r
elsif( (filter_current_state = REMOVE_DEST) and (remove_ctr = x"02") ) then\r
saved_dest_mac(47 downto 40) <= MAC_RXD_IN;\r
--- else\r
--- saved_dest_mac <= saved_dest_mac;\r
end if;\r
end if;\r
end process THE_SAVED_DEST_MAC_PROC;\r
saved_src_mac(39 downto 32) <= MAC_RXD_IN;\r
elsif( (filter_current_state = REMOVE_SRC) and (remove_ctr = x"08") ) then\r
saved_src_mac(47 downto 40) <= MAC_RXD_IN;\r
--- else\r
--- saved_src_mac <= saved_src_mac;\r
end if;\r
end if;\r
end process THE_SAVED_SRC_MAC_PROC;\r
saved_frame_type(15 downto 8) <= MAC_RXD_IN;\r
elsif( (filter_current_state = REMOVE_VTYPE) and (remove_ctr = x"0e") ) then\r
saved_frame_type(7 downto 0) <= MAC_RXD_IN;\r
--- else\r
--- saved_frame_type <= saved_frame_type;\r
end if;\r
end if;\r
end process THE_SAVED_FRAME_TYPE_PROC;\r
saved_src_ip(23 downto 16) <= MAC_RXD_IN;\r
elsif( (filter_current_state = REMOVE_IP) and (remove_ctr = x"0d") ) then\r
saved_src_ip(31 downto 24) <= MAC_RXD_IN;\r
--- else\r
--- saved_src_ip <= saved_src_ip;\r
end if;\r
end if;\r
end process THE_SAVED_SRC_IP_PROC;\r
saved_dest_ip(23 downto 16) <= MAC_RXD_IN;\r
elsif( (filter_current_state = REMOVE_IP) and (remove_ctr = x"11") ) then\r
saved_dest_ip(31 downto 24) <= MAC_RXD_IN;\r
--- else\r
--- saved_dest_ip <= saved_dest_ip;\r
end if;\r
end if;\r
end process THE_SAVED_DEST_IP_PROC;\r
saved_src_udp(15 downto 8) <= MAC_RXD_IN;\r
elsif( (filter_current_state = REMOVE_UDP) and (remove_ctr = x"13") ) then\r
saved_src_udp(7 downto 0) <= MAC_RXD_IN;\r
--- else\r
--- saved_src_udp <= saved_src_udp;\r
end if;\r
end if;\r
end process THE_SAVED_SRC_UDP_PROC;\r
saved_dest_udp(15 downto 8) <= MAC_RXD_IN;\r
elsif( (filter_current_state = REMOVE_UDP) and (remove_ctr = x"15") ) then\r
saved_dest_udp(7 downto 0) <= MAC_RXD_IN;\r
--- else\r
--- saved_dest_udp <= saved_dest_udp;\r
end if;\r
end if;\r
end process THE_SAVED_DEST_UDP_PROC;\r
saved_vid(15 downto 8) <= MAC_RXD_IN;\r
elsif( (filter_current_state = REMOVE_VID) and (remove_ctr = x"0c") ) then\r
saved_vid(7 downto 0) <= MAC_RXD_IN;\r
--- else\r
--- saved_vid <= saved_vid;\r
end if;\r
end if;\r
end process THE_SAVED_VID_PROC;\r
\r
-THE_TYPE_VALIDATOR: trb_net16_gbe_type_validator\r
+THE_TYPE_VALIDATOR: entity trb_net16_gbe_type_validator\r
port map(\r
CLK => CLK,\r
RESET => RESET,\r
VALID_OUT => frame_type_valid\r
);\r
\r
-THE_RECEIVE_FIFO: fifo_4096x9\r
+THE_RECEIVE_FIFO: entity fifo_4096x9\r
port map(\r
Data => rx_data,\r
WrClock => CLK,\r
end if;\r
end process THE_RX_FIFO_SYNC;\r
\r
-THE_SIZES_FIFO: fifo_512x32\r
+THE_SIZES_FIFO: entity fifo_512x32\r
port map(\r
Data(15 downto 0) => rx_bytes_ctr,\r
Data(31 downto 16) => saved_frame_type,\r
Full => sizes_fifo_full\r
);\r
\r
-THE_MACS_FIFO: fifo_512x72\r
+THE_MACS_FIFO: entity fifo_512x72\r
port map(\r
Data(47 downto 0) => saved_src_mac,\r
Data(63 downto 48) => saved_src_udp,\r
Full => open\r
);\r
\r
-THE_MACD_FIFO: fifo_512x72\r
+THE_MACD_FIFO: entity fifo_512x72\r
port map(\r
Data(47 downto 0) => saved_dest_mac,\r
Data(63 downto 48) => saved_dest_udp,\r
Full => open\r
);\r
\r
-THE_IP_FIFO: fifo_512x72\r
+THE_IP_FIFO: entity fifo_512x72\r
port map(\r
Data(31 downto 0) => saved_src_ip,\r
Data(63 downto 32) => saved_dest_ip,\r
end if;\r
end process THE_FRAME_VALID_PROC;\r
\r
-THE_RX_BYTES_CTR_PROC: process( CLK )\r
+THE_RX_BYTES_CTR_PROC: process( CLK, RESET )\r
begin\r
- if( rising_edge(CLK) ) then\r
- if ( (RESET = '1') or (delayed_frame_valid_q = '1') ) then\r
+ if ( RESET = '1' ) then\r
+ rx_bytes_ctr <= x"0001";\r
+ elsif( rising_edge(CLK) ) then\r
+ if( delayed_frame_valid_q = '1' ) then\r
rx_bytes_ctr <= x"0001";\r
elsif( fifo_wr_en = '1' ) then\r
rx_bytes_ctr <= rx_bytes_ctr + 1;\r
end if;\r
end process THE_RX_BYTES_CTR_PROC;\r
\r
-THE_ERROR_FRAMES_CTR_PROC: process( CLK )\r
+THE_ERROR_FRAMES_CTR_PROC: process( CLK, RESET )\r
begin\r
- if( rising_edge(CLK) ) then\r
- if ( RESET = '1' ) then\r
- error_frames_ctr <= (others => '0');\r
- elsif( MAC_RX_ER_IN = '1' ) then\r
- error_frames_ctr <= error_frames_ctr + 1;\r
- end if;\r
+ if ( RESET = '1' ) then\r
+ error_frames_ctr <= (others => '0');\r
+ elsif( rising_edge(CLK) ) then\r
+ error_frames_ctr <= error_frames_ctr + 1;\r
end if;\r
end process THE_ERROR_FRAMES_CTR_PROC;\r
\r
FR_FRAME_VALID_OUT <= frame_valid_q when rising_edge(CLK);\r
\r
-THE_RECEIVED_FRAMES_CTR: process( CLK )\r
+THE_RECEIVED_FRAMES_CTR: process( CLK, RESET )\r
begin\r
- if( rising_edge(CLK) ) then\r
- if ( RESET = '1' ) then\r
- dbg_rec_frames <= (others => '0');\r
- elsif( MAC_RX_EOF_IN = '1' ) then\r
- dbg_rec_frames <= dbg_rec_frames + 1;\r
- end if;\r
+ if ( RESET = '1' ) then\r
+ dbg_rec_frames <= (others => '0');\r
+ elsif( rising_edge(CLK) ) then\r
+ dbg_rec_frames <= dbg_rec_frames + 1;\r
end if;\r
end process THE_RECEIVED_FRAMES_CTR;\r
\r
-THE_DROPPED_FRAMES_CTR: process( CLK )\r
+THE_DROPPED_FRAMES_CTR: process( CLK, RESET )\r
begin\r
- if( rising_edge(CLK) ) then\r
- if ( RESET = '1' ) then\r
- dbg_drp_frames <= (others => '0');\r
- elsif( (filter_current_state = DECIDE) and (frame_type_valid = '0') ) then\r
+ if ( RESET = '1' ) then\r
+ dbg_drp_frames <= (others => '0');\r
+ elsif( rising_edge(CLK) ) then\r
+ if( (filter_current_state = DECIDE) and (frame_type_valid = '0') ) then\r
dbg_drp_frames <= dbg_drp_frames + 1;\r
end if;\r
end if;\r
MONITOR_RX_FRAMES_OUT <= std_logic_vector(dbg_rec_frames);\r
MONITOR_RX_BYTES_OUT <= std_logic_vector(mon_rec_bytes);\r
\r
-THE_MON_REC_BYTES_PROC: process(CLK)\r
+THE_MON_REC_BYTES_PROC: process( CLK, RESET )\r
begin\r
- if( rising_edge(CLK) ) then\r
- if ( RESET = '1' ) then\r
- mon_rec_bytes <= (others => '0');\r
- elsif( fifo_wr_en = '1' ) then\r
+ if ( RESET = '1' ) then\r
+ mon_rec_bytes <= (others => '0');\r
+ elsif( rising_edge(CLK) ) then\r
+ if( fifo_wr_en = '1' ) then\r
mon_rec_bytes <= mon_rec_bytes + x"1";\r
--- else\r
--- mon_rec_bytes <= mon_rec_bytes;\r
end if;\r
end if;\r
end process;\r
\r
end trb_net16_gbe_frame_receiver;\r
-\r
-\r
library work;
use work.trb_net_std.all;
use work.trb_net_components.all;
-use work.trb_net16_hub_func.all;
+--use work.trb_net16_hub_func.all;
-use work.trb_net_gbe_components.all;
-use work.trb_net_gbe_protocols.all;
+--use work.trb_net_gbe_components.all;
+use work.gbe_protocols.all;
--********
-- controls the work of the whole gbe in both directions
entity trb_net16_gbe_main_control is
generic(
- RX_PATH_ENABLE : integer range 0 to 1 := 1;
- DO_SIMULATION : integer range 0 to 1 := 0;
- --
INCLUDE_SLOWCTRL : std_logic := '0';
INCLUDE_DHCP : std_logic := '0';
INCLUDE_ARP : std_logic := '0';
RESET : in std_logic;
--
MC_LINK_OK_OUT : out std_logic; -- remark: set to '1' internally
- MC_RESET_LINK_IN : in std_logic; -- remark: RESET
- MC_IDLE_TOO_LONG_OUT : out std_logic; -- remark: unused
+-- MC_RESET_LINK_IN : in std_logic; -- remark: RESET
+-- MC_IDLE_TOO_LONG_OUT : out std_logic; -- remark: unused
MC_DHCP_DONE_OUT : out std_logic; -- remark: set if link_current_state = ACTIVE
MY_IP_OUT : out std_logic_vector(31 downto 0);
MC_MY_MAC_IN : in std_logic_vector(47 downto 0);
MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_DROP_IN_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_DROP_OUT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2 * c_MAX_PROTOCOLS * 32 - 1 downto 0);
--
- DATA_HIST_OUT : out hist_array;
SCTRL_HIST_OUT : out hist_array;
--
DEBUG_OUT : out std_logic_vector(63 downto 0)
signal link_current_state, link_next_state : link_states;
attribute syn_encoding of link_current_state : signal is "onehot";
--- signal link_down_ctr : std_logic_vector(15 downto 0);
--- signal link_down_ctr_lock : std_logic;
signal link_ok : std_logic;
signal link_ok_timeout_ctr : std_logic_vector(15 downto 0);
- signal mac_control_debug : std_logic_vector(63 downto 0);
-
type flow_states is (IDLE, TRANSMIT_CTRL, WAIT_FOR_FC, CLEANUP);
signal flow_current_state, flow_next_state : flow_states;
attribute syn_encoding of flow_current_state : signal is "onehot";
signal rc_data_local : std_logic_vector(8 downto 0);
- -- debug
- signal frame_waiting_ctr : std_logic_vector(15 downto 0);
- signal ps_busy_q : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
- signal rc_frame_proto_q : std_Logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
-
type redirect_states is (IDLE, CHECK_TYPE, DROP, CHECK_BUSY, LOAD, BUSY, WAIT_ONE, FINISH, CLEANUP);
signal redirect_current_state, redirect_next_state : redirect_states;
attribute syn_encoding of redirect_current_state : signal is "onehot";
signal ps_wr_en_q : std_logic;
signal ps_wr_en_qq : std_logic;
- type stats_states is (IDLE, LOAD_VECTOR, CLEANUP);
- signal stats_current_state, stats_next_state : stats_states;
-
- signal stat_rdy : std_logic;
- signal stat_ack : std_logic;
- signal rx_stat_en_q : std_logic;
- signal rx_stat_vec_q : std_logic_vector(31 downto 0);
-
- type array_of_ctrs is array (15 downto 0) of std_logic_vector(31 downto 0);
- signal arr : array_of_ctrs;
- signal stats_ctr : integer range 0 to 15;
- signal stat_data : std_logic_vector(31 downto 0);
- signal stat_addr : std_logic_vector(7 downto 0);
-
- signal dbg_ps : std_Logic_vector(63 downto 0);
-
signal tc_data : std_logic_vector(8 downto 0);
attribute syn_preserve : boolean;
begin
protocol_selector : entity work.trb_net16_gbe_protocol_selector
generic map(
- RX_PATH_ENABLE => RX_PATH_ENABLE,
- DO_SIMULATION => DO_SIMULATION,
INCLUDE_SLOWCTRL => INCLUDE_SLOWCTRL,
INCLUDE_DHCP => INCLUDE_DHCP,
INCLUDE_ARP => INCLUDE_ARP,
port map(
CLK => CLK,
RESET => RESET,
- RESET_FOR_DHCP => MC_RESET_LINK_IN,
PS_DATA_IN => rc_data_local,
PS_WR_EN_IN => ps_wr_en_qq,
PS_PROTO_SELECT_IN => proto_select,
FWD_FULL_OUT => FWD_FULL_OUT,
-- input for statistics from outside
- STAT_DATA_IN => stat_data,
- STAT_ADDR_IN => stat_addr,
- STAT_DATA_RDY_IN => stat_rdy,
- STAT_DATA_ACK_OUT => stat_ack,
MONITOR_SELECT_REC_OUT => MONITOR_SELECT_REC_OUT,
MONITOR_SELECT_REC_BYTES_OUT => MONITOR_SELECT_REC_BYTES_OUT,
MONITOR_SELECT_SENT_BYTES_OUT => MONITOR_SELECT_SENT_BYTES_OUT,
MONITOR_SELECT_SENT_OUT => MONITOR_SELECT_SENT_OUT,
- MONITOR_SELECT_DROP_OUT_OUT => MONITOR_SELECT_DROP_OUT_OUT,
- MONITOR_SELECT_DROP_IN_OUT => MONITOR_SELECT_DROP_IN_OUT,
MONITOR_SELECT_GEN_DBG_OUT => MONITOR_SELECT_GEN_DBG_OUT,
- DATA_HIST_OUT => DATA_HIST_OUT,
SCTRL_HIST_OUT => SCTRL_HIST_OUT,
DEBUG_OUT => selector_debug
);
proto_select <= RC_FRAME_PROTO_IN when disable_redirect = '0' else (others => '0');
-- gk 07.11.11
- DISABLE_REDIRECT_PROC: process( CLK )
+ -- we do not answer at all, unless we are in either ACTIVE or GET_ADDRESS state.
+ -- in GET_ADDRESS state, we only answer on DHCP frames.
+ DISABLE_REDIRECT_PROC: process( CLK, RESET )
begin
- if( rising_edge(CLK) ) then
- if ( RESET = '1' ) then
- disable_redirect <= '0';
- elsif( redirect_current_state = CHECK_TYPE ) then
+ if ( RESET = '1' ) then
+ disable_redirect <= '0';
+ elsif( rising_edge(CLK) ) then
+ if( redirect_current_state = CHECK_TYPE ) then
if ( (link_current_state /= ACTIVE) and (link_current_state /= GET_ADDRESS) ) then
disable_redirect <= '1';
- elsif( (link_current_state = GET_ADDRESS) and (RC_FRAME_PROTO_IN /= "10") ) then -- x"10" ?!?!?
+ elsif( (link_current_state = GET_ADDRESS) and (RC_FRAME_PROTO_IN /= "10") ) then -- (UDP, DHCP)
disable_redirect <= '1';
else
disable_redirect <= '0';
end if;
- else
- disable_redirect <= disable_redirect;
end if;
end if;
end process DISABLE_REDIRECT_PROC;
end if;
end process SYNC_PROC;
- REDIRECT_MACHINE_PROC: process( CLK )
+ REDIRECT_MACHINE_PROC: process( CLK, RESET )
begin
- if( rising_edge(CLK) ) then
- if ( RESET = '1' ) then
- redirect_current_state <= IDLE;
- elsif( RX_PATH_ENABLE = 1 ) then
- redirect_current_state <= redirect_next_state;
- else
- redirect_current_state <= IDLE;
- end if;
+ if ( RESET = '1' ) then
+ redirect_current_state <= IDLE;
+ elsif( rising_edge(CLK) ) then
+ redirect_current_state <= redirect_next_state;
end if;
end process REDIRECT_MACHINE_PROC;
loaded_bytes_ctr <= (others => '0');
elsif( ((redirect_current_state = LOAD) or (redirect_current_state = DROP)) and (rc_rd_en = '1') )then
loaded_bytes_ctr <= loaded_bytes_ctr + x"1";
- else
- loaded_bytes_ctr <= loaded_bytes_ctr;
end if;
end if;
end process LOADED_BYTES_CTR_PROC;
--*********************
-- DATA FLOW CONTROL
- FLOW_MACHINE_PROC: process( RESET, CLK )
+ FLOW_MACHINE_PROC: process( CLK, RESET )
begin
- if RESET = '1' then
+ if ( RESET = '1' ) then
flow_current_state <= IDLE;
- elsif rising_edge(CLK) then
+ elsif( rising_edge(CLK) ) then
flow_current_state <= flow_next_state;
end if;
end process FLOW_MACHINE_PROC;
--***********************
-- LINK STATE CONTROL
- lsm_impl_gen: if DO_SIMULATION = 0 generate
- LINK_STATE_MACHINE_PROC: process( MC_RESET_LINK_IN, CLK )
- begin
- if MC_RESET_LINK_IN = '1' then
- link_current_state <= INACTIVE;
- elsif rising_edge(CLK) then
- if RX_PATH_ENABLE = 1 then
- link_current_state <= link_next_state;
- else
- link_current_state <= INACTIVE;
- end if;
- end if;
- end process;
- end generate lsm_impl_gen;
-
- lsm_sim_gen: if DO_SIMULATION = 1 generate
- LINK_STATE_MACHINE_PROC: process( MC_RESET_LINK_IN, CLK )
- begin
- if MC_RESET_LINK_IN = '1' then
- link_current_state <= GET_ADDRESS;
- elsif rising_edge(CLK) then
- if RX_PATH_ENABLE = 1 then
- link_current_state <= link_next_state;
- else
- link_current_state <= ACTIVE;
- end if;
- end if;
- end process;
- end generate lsm_sim_gen;
+ LINK_STATE_MACHINE_PROC: process( RESET, CLK )
+ begin
+ if ( RESET = '1' ) then
+ link_current_state <= INACTIVE;
+ elsif( rising_edge(CLK) ) then
+ link_current_state <= link_next_state;
+ end if;
+ end process;
incl_dhcp_gen : if (INCLUDE_DHCP = '1') generate
incl_dhcp <= '1';
link_next_state <= ACTIVE;
end if;
- when others => link_next_state <= INACTIVE;
+ when others =>
+ link_next_state <= INACTIVE;
end case;
end process LINK_STATE_MACHINE;
-- END OF LINK STATE CONTROL
--*************
--- process(CLK)
--- begin
--- if rising_edge(CLK) then
--- if link_current_state = INACTIVE and PCS_AN_COMPLETE_IN = '1' then
--- tsm_reconf <= '1';
--- else
--- tsm_reconf <= '0';
--- end if;
--- end if;
--- end process;
--- MAC_RECONF_OUT <= tsm_reconf;
-
--- TSM_HADDR_OUT <= tsm_haddr;
--- TSM_HCS_N_OUT <= tsm_hcs_n;
--- TSM_HDATA_OUT <= tsm_hdata;
--- TSM_HREAD_N_OUT <= tsm_hread_n;
--- TSM_HWRITE_N_OUT <= tsm_hwrite_n;
-
- -- END OF TRI SPEED MAC CONTROLLER
- --***************
-
DEBUG_OUT <= selector_debug;
end trb_net16_gbe_main_control;
library work;
use work.trb_net_std.all;
use work.trb_net_components.all;
-use work.trb_net16_hub_func.all;
+--use work.trb_net16_hub_func.all;
-use work.trb_net_gbe_components.all;
-use work.trb_net_gbe_protocols.all;
+--use work.trb_net_gbe_components.all;
+use work.gbe_protocols.all;
--********
-- maps the frame type and protocol code into internal value which sets the priority
entity trb_net16_gbe_protocol_prioritizer is
-port (
- CLK : in std_logic;
- RESET : in std_logic;
-
- FRAME_TYPE_IN : in std_logic_vector(15 downto 0); -- recovered frame type
- PROTOCOL_CODE_IN : in std_logic_vector(7 downto 0); -- ip protocol
- UDP_PROTOCOL_IN : in std_logic_vector(15 downto 0);
-
- CODE_OUT : out std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0)
+port(
+ CLK : in std_logic;
+ RESET : in std_logic;
+ FRAME_TYPE_IN : in std_logic_vector(15 downto 0); -- recovered frame type
+ PROTOCOL_CODE_IN : in std_logic_vector(7 downto 0); -- ip protocol
+ UDP_PROTOCOL_IN : in std_logic_vector(15 downto 0);
+ CODE_OUT : out std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0)
);
end trb_net16_gbe_protocol_prioritizer;
architecture trb_net16_gbe_protocol_prioritizer of trb_net16_gbe_protocol_prioritizer is
---attribute HGROUP : string;
---attribute HGROUP of trb_net16_gbe_protocol_prioritizer : architecture is "GBE_MAIN_group";
-
begin
-PRIORITIZE : process(RESET, CLK)
+PRIORITIZE: process( CLK, RESET )
begin
- if RESET = '1' then
- CODE_OUT <= (others => '0');
- elsif rising_edge(CLK) then
-
- CODE_OUT <= (others => '0');
-
- --**** HERE ADD YOU PROTOCOL RECOGNITION AT WANTED PRIORITY LEVEL
- -- priority level is the bit position in the CODE_OUT vector
- -- less significant bit has the higher priority
- case FRAME_TYPE_IN is
-
- -- IPv4
- when x"0800" =>
- if (PROTOCOL_CODE_IN = x"11") then -- UDP
- -- No. 2 = DHCP
- if (UDP_PROTOCOL_IN = x"0044") then -- DHCP Client
- CODE_OUT(1) <= '1';
- -- No. 4 = SCTRL
- elsif (UDP_PROTOCOL_IN = x"6590") then -- SCTRL module
- CODE_OUT(2) <= '1';
- else
- -- branch for pure IPv4
- CODE_OUT <= (others => '0');
- end if;
- -- No. 3 = ICMP
- elsif (PROTOCOL_CODE_IN = x"01") then -- ICMP
- CODE_OUT(4) <= '1';
- else
- CODE_OUT <= (others => '0');
- end if;
-
- -- No. 1 = ARP
- when x"0806" =>
- CODE_OUT(0) <= '1';
-
- -- last slot is reserved for Trash
- when others =>
- CODE_OUT <= (others => '0');
-
- end case;
-
- end if;
+ if ( RESET = '1' ) then
+ CODE_OUT <= (others => '0');
+ elsif( rising_edge(CLK) ) then
+
+ CODE_OUT <= (others => '0');
+
+ --**** HERE ADD YOU PROTOCOL RECOGNITION AT WANTED PRIORITY LEVEL
+ -- priority level is the bit position in the CODE_OUT vector
+ -- less significant bit has the higher priority
+ case FRAME_TYPE_IN is
+
+ -- IPv4
+ when x"0800" =>
+ if ( PROTOCOL_CODE_IN = x"11" ) then -- UDP
+ -- No. 2 = DHCP
+ if ( UDP_PROTOCOL_IN = x"0044" ) then -- DHCP Client
+ CODE_OUT(1) <= '1';
+ -- No. 4 = SCTRL
+ elsif( UDP_PROTOCOL_IN = x"6590" ) then -- SCTRL module
+ CODE_OUT(2) <= '1';
+ else
+ -- branch for pure IPv4
+ CODE_OUT <= (others => '0');
+ end if;
+ -- No. 3 = ICMP
+ elsif( PROTOCOL_CODE_IN = x"01") then -- ICMP
+ CODE_OUT(4) <= '1';
+ else
+ CODE_OUT <= (others => '0');
+ end if;
+
+ -- No. 1 = ARP
+ when x"0806" =>
+ CODE_OUT(0) <= '1';
+
+ -- last slot is reserved for Trash
+ when others =>
+ CODE_OUT <= (others => '0');
+
+ end case;
+
+ end if;
end process PRIORITIZE;
end trb_net16_gbe_protocol_prioritizer;
-
-
use work.trb_net_components.all;
use work.trb_net16_hub_func.all;
-use work.trb_net_gbe_components.all;
-use work.trb_net_gbe_protocols.all;
-
---********
--- multiplexes between different protocols and manages the responses
---
---
+--use work.trb_net_gbe_components.all;
+use work.gbe_protocols.all;
entity trb_net16_gbe_protocol_selector is
generic(
- RX_PATH_ENABLE : integer range 0 to 1 := 1;
- DO_SIMULATION : integer range 0 to 1 := 0;
INCLUDE_SLOWCTRL : std_logic := '0';
INCLUDE_DHCP : std_logic := '0';
INCLUDE_ARP : std_logic := '0';
port(
CLK : in std_logic; -- system clock
RESET : in std_logic;
- RESET_FOR_DHCP : in std_logic;
-- signals to/from main controller
PS_DATA_IN : in std_logic_vector(8 downto 0);
PS_WR_EN_IN : in std_logic;
FWD_READY_OUT : out std_logic;
FWD_FULL_OUT : out std_logic;
-- input for statistics from outside
- STAT_DATA_IN : in std_logic_vector(31 downto 0);
- STAT_ADDR_IN : in std_logic_vector(7 downto 0);
- STAT_DATA_RDY_IN : in std_logic;
- STAT_DATA_ACK_OUT : out std_logic;
+-- STAT_DATA_IN : in std_logic_vector(31 downto 0);
+-- STAT_ADDR_IN : in std_logic_vector(7 downto 0);
+-- STAT_DATA_RDY_IN : in std_logic;
+-- STAT_DATA_ACK_OUT : out std_logic;
MONITOR_SELECT_REC_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_DROP_IN_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_DROP_OUT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
+-- MONITOR_SELECT_DROP_IN_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
+-- MONITOR_SELECT_DROP_OUT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2 * c_MAX_PROTOCOLS * 32 - 1 downto 0);
- DATA_HIST_OUT : out hist_array;
+-- DATA_HIST_OUT : out hist_array;
SCTRL_HIST_OUT : out hist_array;
DEBUG_OUT : out std_logic_vector(63 downto 0)
);
architecture trb_net16_gbe_protocol_selector of trb_net16_gbe_protocol_selector is
- --attribute HGROUP : string;
- --attribute HGROUP of trb_net16_gbe_protocol_selector : architecture is "GBE_MAIN_group";
-
attribute syn_encoding : string;
signal rd_en : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
signal tc_src_udp : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
signal tc_ip_proto : std_logic_vector(c_MAX_PROTOCOLS * 8 - 1 downto 0);
- -- plus 1 is for the outside
- signal stat_data : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- signal stat_addr : std_logic_vector(c_MAX_PROTOCOLS * 8 - 1 downto 0);
- signal stat_rdy : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
- signal stat_ack : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
- signal tc_ip_size : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
- signal tc_udp_size : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
- signal tc_size_left : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
- signal tc_flags_size : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
-
- signal tc_data_not_valid : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
-
type select_states is (IDLE, LOOP_OVER, SELECT_ONE, PROCESS_REQUEST, CLEANUP);
signal select_current_state, select_next_state : select_states;
attribute syn_encoding of select_current_state : signal is "onehot";
arp_gen: if INCLUDE_ARP = '1' generate
-- protocol Nr. 1 ARP
- ARP: trb_net16_gbe_response_constructor_ARP
- generic map(STAT_ADDRESS_BASE => 6
- )
+ ARP: entity trb_net16_gbe_response_constructor_ARP
port map(
CLK => CLK,
RESET => RESET,
TC_SRC_MAC_OUT => tc_src_mac(1 * 48 - 1 downto 0 * 48),
TC_SRC_IP_OUT => tc_src_ip(1 * 32 - 1 downto 0 * 32),
TC_SRC_UDP_OUT => tc_src_udp(1 * 16 - 1 downto 0 * 16),
- STAT_DATA_OUT => stat_data(1 * 32 - 1 downto 0 * 32),
- STAT_ADDR_OUT => stat_addr(1 * 8 - 1 downto 0 * 8),
- STAT_DATA_RDY_OUT => stat_rdy(0),
- STAT_DATA_ACK_IN => stat_ack(0),
- RECEIVED_FRAMES_OUT => open,
- SENT_FRAMES_OUT => open,
DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(1 * 64 - 1 downto 0 * 64)
-- END OF INTERFACE
);
dhcp_gen: if INCLUDE_DHCP = '1' generate
-- protocol No. 2 DHCP
- DHCP: trb_net16_gbe_response_constructor_DHCP
- generic map(
- STAT_ADDRESS_BASE => 0,
- DO_SIMULATION => DO_SIMULATION
- )
+ DHCP: entity trb_net16_gbe_response_constructor_DHCP
port map(
CLK => CLK,
- RESET => RESET_FOR_DHCP, --RESET,
+ RESET => RESET, --RESET_FOR_DHCP,
-- INTERFACE
MY_MAC_IN => MY_MAC_IN,
MY_IP_IN => my_ip,
TC_SRC_MAC_OUT => tc_src_mac(2 * 48 - 1 downto 1 * 48),
TC_SRC_IP_OUT => tc_src_ip(2 * 32 - 1 downto 1 * 32),
TC_SRC_UDP_OUT => tc_src_udp(2 * 16 - 1 downto 1 * 16),
- STAT_DATA_OUT => stat_data(2 * 32 - 1 downto 1 * 32),
- STAT_ADDR_OUT => stat_addr(2 * 8 - 1 downto 1 * 8),
- STAT_DATA_RDY_OUT => stat_rdy(1),
- STAT_DATA_ACK_IN => stat_ack(1),
- RECEIVED_FRAMES_OUT => open,
- SENT_FRAMES_OUT => open,
-- END OF INTERFACE
MY_IP_OUT => my_ip,
DHCP_START_IN => DHCP_START_IN,
ping_gen: if INCLUDE_PING = '1' generate
--protocol No. 3 Ping
Ping: entity work.trb_net16_gbe_response_constructor_Ping
- generic map(STAT_ADDRESS_BASE => 3
- )
port map(
CLK => CLK,
RESET => RESET,
TC_SRC_MAC_OUT => tc_src_mac(5 * 48 - 1 downto 4 * 48),
TC_SRC_IP_OUT => tc_src_ip(5 * 32 - 1 downto 4 * 32),
TC_SRC_UDP_OUT => tc_src_udp(5 * 16 - 1 downto 4 * 16),
- STAT_DATA_OUT => open,
- STAT_ADDR_OUT => open,
- STAT_DATA_RDY_OUT => open,
- STAT_DATA_ACK_IN => '0',
- RECEIVED_FRAMES_OUT => open,
- SENT_FRAMES_OUT => open,
DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(5 * 64 - 1 downto 4 * 64)
-- END OF INTERFACE
);
end generate no_ping_gen;
sctrl_gen: if INCLUDE_SLOWCTRL = '1' generate
- SCTRL: trb_net16_gbe_response_constructor_SCTRL
- generic map(STAT_ADDRESS_BASE => 8,
- SLOWCTRL_BUFFER_SIZE => SLOWCTRL_BUFFER_SIZE
+ SCTRL: entity trb_net16_gbe_response_constructor_SCTRL
+ generic map( SLOWCTRL_BUFFER_SIZE => SLOWCTRL_BUFFER_SIZE
)
port map(
CLK => CLK,
TC_SRC_MAC_OUT => tc_src_mac(3 * 48 - 1 downto 2 * 48),
TC_SRC_IP_OUT => tc_src_ip(3 * 32 - 1 downto 2 * 32),
TC_SRC_UDP_OUT => tc_src_udp(3 * 16 - 1 downto 2 * 16),
- STAT_DATA_OUT => stat_data(3 * 32 - 1 downto 2 * 32),
- STAT_ADDR_OUT => stat_addr(3 * 8 - 1 downto 2 * 8),
- STAT_DATA_RDY_OUT => stat_rdy(2),
- STAT_DATA_ACK_IN => stat_ack(2),
DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(3 * 64 - 1 downto 2 * 64),
-- END OF INTERFACE
GSC_CLK_IN => GSC_CLK_IN,
PS_BUSY_OUT <= busy;
- SELECT_MACHINE_PROC : process(RESET, CLK)
+ SELECT_MACHINE_PROC: process( CLK, RESET )
begin
- if RESET = '1' then
+ if ( RESET = '1' ) then
select_current_state <= IDLE;
- elsif rising_edge(CLK) then
+ elsif( rising_edge(CLK) ) then
select_current_state <= select_next_state;
end if;
end process SELECT_MACHINE_PROC;
- SELECT_MACHINE : process(select_current_state, MC_BUSY_IN, resp_ready, index, zeros, busy)
+ SELECT_MACHINE: process(select_current_state, MC_BUSY_IN, resp_ready, index, zeros, busy)
begin
select_state <= x"0";
end process SELECT_MACHINE;
- INDEX_PROC : process(CLK)
+ INDEX_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (select_current_state = IDLE) then
+ if( rising_edge(CLK) ) then
+ if ( select_current_state = IDLE ) then
index <= 0;
- elsif (select_current_state = LOOP_OVER and resp_ready(index) = '0') then
+ elsif( select_current_state = LOOP_OVER and resp_ready(index) = '0' ) then
index <= index + 1;
- else
- index <= index;
end if;
end if;
end process INDEX_PROC;
- SELECTOR_PROC : process(CLK)
+ SELECTOR_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (select_current_state = SELECT_ONE or select_current_state = PROCESS_REQUEST) then
+ if( rising_edge(CLK) ) then
+ if( select_current_state = SELECT_ONE or select_current_state = PROCESS_REQUEST ) then
TC_DATA_OUT <= tc_data((index + 1) * 9 - 1 downto index * 9);
TC_FRAME_SIZE_OUT <= tc_size((index + 1) * 16 - 1 downto index * 16);
TC_FRAME_TYPE_OUT <= tc_type((index + 1) * 16 - 1 downto index * 16);
TC_SRC_UDP_OUT <= tc_src_udp((index + 1) * 16 - 1 downto index * 16);
TC_IP_PROTOCOL_OUT <= tc_ip_proto((index + 1) * 8 - 1 downto index * 8);
TC_IDENT_OUT <= tc_ident((index + 1) * 16 - 1 downto index * 16);
- if (select_current_state = SELECT_ONE) then
+ if( select_current_state = SELECT_ONE ) then
PS_RESPONSE_READY_OUT <= '1';
selected(index) <= '0';
else
end process SELECTOR_PROC;
end trb_net16_gbe_protocol_selector;
-
-
library work;
use work.trb_net_std.all;
use work.trb_net_components.all;
-use work.trb_net16_hub_func.all;
+--use work.trb_net16_hub_func.all;
-use work.trb_net_gbe_components.all;
-use work.trb_net_gbe_protocols.all;
+--use work.trb_net_gbe_components.all;
+use work.gbe_protocols.all;
--********
-- controller has to control the rest of the logic (TX part, TS_MAC, HUB) accordingly to
RC_SRC_UDP_PORT_OUT <= FR_SRC_UDP_PORT_IN;
RC_DEST_UDP_PORT_OUT <= FR_DEST_UDP_PORT_IN;
-protocol_prioritizer: trb_net16_gbe_protocol_prioritizer
+protocol_prioritizer: entity trb_net16_gbe_protocol_prioritizer
port map(
CLK => CLK,
RESET => reset_prioritizer,
reset_prioritizer <= '1' when load_current_state = IDLE else '0';
---RC_FRAME_PROTO_OUT <= proto_code when (and_all(proto_code) = '0') else (others => '0');
RC_FRAME_PROTO_OUT <= proto_code; -- no more ones as the incorrect value, last slot for Trash
-LOAD_MACHINE_PROC: process( CLK )
+LOAD_MACHINE_PROC: process( CLK, RESET )
begin
- if( rising_edge(CLK) ) then
- if( RESET = '1' ) then
- load_current_state <= IDLE;
- else
- load_current_state <= load_next_state;
- end if;
+ if ( RESET = '1' ) then
+ load_current_state <= IDLE;
+ elsif( rising_edge(CLK) ) then
+ load_current_state <= load_next_state;
end if;
end process LOAD_MACHINE_PROC;
end if;
end process;
-FRAMES_REC_CTR_PROC: process( CLK )
+FRAMES_REC_CTR_PROC: process( CLK, RESET )
begin
- if( rising_edge(CLK) ) then
- if ( RESET = '1' ) then
- frames_received_ctr <= (others => '0');
- elsif( FR_FRAME_VALID_IN = '1' ) then
+ if ( RESET = '1' ) then
+ frames_received_ctr <= (others => '0');
+ elsif( rising_edge(CLK) ) then
+ if( FR_FRAME_VALID_IN = '1' ) then
frames_received_ctr <= frames_received_ctr + 1;
- else
- frames_received_ctr <= frames_received_ctr;
end if;
end if;
end process FRAMES_REC_CTR_PROC;
-FRAMES_READOUT_CTR_PROC: process( CLK )
+FRAMES_READOUT_CTR_PROC: process( CLK, RESET )
begin
- if( rising_edge(CLK) ) then
- if ( RESET = '1' ) then
- frames_readout_ctr <= (others => '0');
- elsif( RC_LOADING_DONE_IN = '1' ) then
+ if ( RESET = '1' ) then
+ frames_readout_ctr <= (others => '0');
+ elsif( rising_edge(CLK) ) then
+ if( RC_LOADING_DONE_IN = '1' ) then
frames_readout_ctr <= frames_readout_ctr + 1;
- else
- frames_readout_ctr <= frames_readout_ctr;
end if;
end if;
end process FRAMES_READOUT_CTR_PROC;
-- debug only
BYTES_REC_CTR_PROC : process( CLK )
begin
- if( rising_edge(CLK) ) then
- if ( RESET = '1' ) then
- bytes_rec_ctr <= (others => '0');
- elsif( FR_FRAME_VALID_IN = '1' ) then
+ if ( RESET = '1' ) then
+ bytes_rec_ctr <= (others => '0');
+ elsif( rising_edge(CLK) ) then
+ if( FR_FRAME_VALID_IN = '1' ) then
bytes_rec_ctr <= bytes_rec_ctr + unsigned(FR_FRAME_SIZE_IN);
- else
- bytes_rec_ctr <= bytes_rec_ctr;
end if;
end if;
end process BYTES_REC_CTR_PROC;
library work;
use work.trb_net_std.all;
use work.trb_net_components.all;
-use work.trb_net16_hub_func.all;
+--use work.trb_net16_hub_func.all;
-use work.trb_net_gbe_components.all;
-use work.trb_net_gbe_protocols.all;
+--use work.trb_net_gbe_components.all;
+use work.gbe_protocols.all;
--********
end process VALID_OUT_PROC;
end trb_net16_gbe_type_validator;
-
-
library work;
use work.trb_net_std.all;
-use work.trb_net_gbe_protocols.all;
+use work.gbe_protocols.all;
package trb_net_gbe_components is
-
-
component trb_net16_gbe_transmit_control2 is
port (
CLK : in std_logic;
use work.trb_net_gbe_components.all;
use work.trb_net_gbe_protocols.all;
---********
--- creates a reply for an incoming ARP request
-
entity trb_net16_gbe_response_constructor_ARP is
-generic ( STAT_ADDRESS_BASE : integer := 0
-);
port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_RD_EN_IN : in std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+-- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+--
+ TC_RD_EN_IN : in std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-- END OF INTERFACE
-
-- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
);
end trb_net16_gbe_response_constructor_ARP;
-
architecture trb_net16_gbe_response_constructor_ARP of trb_net16_gbe_response_constructor_ARP is
---attribute HGROUP : string;
---attribute HGROUP of trb_net16_gbe_response_constructor_ARP : architecture is "GBE_MAIN_group";
-
-attribute syn_encoding : string;
+attribute syn_encoding : string;
type dissect_states is (IDLE, READ_FRAME, DECIDE, LOAD_FRAME, WAIT_FOR_LOAD, CLEANUP);
signal dissect_current_state, dissect_next_state : dissect_states;
values(191 downto 144) <= PS_SRC_MAC_ADDRESS_IN; -- target mac
values(223 downto 192) <= saved_sender_ip; -- target ip
-DISSECT_MACHINE_PROC : process(RESET, CLK)
+DISSECT_MACHINE_PROC: process( CLK, RESET )
begin
- if RESET = '1' then
- dissect_current_state <= IDLE;
- elsif rising_edge(CLK) then
--- if (RESET = '1') then
--- dissect_current_state <= IDLE;
--- else
- dissect_current_state <= dissect_next_state;
--- end if;
- end if;
+ if ( RESET = '1' ) then
+ dissect_current_state <= IDLE;
+ elsif( rising_edge(CLK) ) then
+ dissect_current_state <= dissect_next_state;
+ end if;
end process DISSECT_MACHINE_PROC;
DISSECT_MACHINE : process(dissect_current_state, MY_IP_IN, PS_WR_EN_IN, PS_ACTIVATE_IN, PS_DATA_IN, data_ctr, PS_SELECTED_IN, saved_target_ip)
begin
- case dissect_current_state is
-
- when IDLE =>
- state <= x"1";
- if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
- dissect_next_state <= READ_FRAME;
- else
- dissect_next_state <= IDLE;
- end if;
-
- when READ_FRAME =>
- state <= x"2";
- if (PS_DATA_IN(8) = '1') then
- dissect_next_state <= DECIDE;
- else
- dissect_next_state <= READ_FRAME;
- end if;
-
- when DECIDE =>
- state <= x"3";
- if (saved_target_ip = MY_IP_IN) then
- dissect_next_state <= WAIT_FOR_LOAD;
- -- in case the request is not for me, drop it
- else
- dissect_next_state <= IDLE;
- end if;
-
- when WAIT_FOR_LOAD =>
- state <= x"4";
- if (PS_SELECTED_IN = '1') then
- dissect_next_state <= LOAD_FRAME;
- else
- dissect_next_state <= WAIT_FOR_LOAD;
- end if;
-
- when LOAD_FRAME =>
- state <= x"5";
- if (data_ctr = 28) then
- dissect_next_state <= CLEANUP;
- else
- dissect_next_state <= LOAD_FRAME;
- end if;
-
- when CLEANUP =>
- state <= x"e";
- dissect_next_state <= IDLE;
-
- end case;
+ case dissect_current_state is
+
+ when IDLE =>
+ state <= x"1";
+ if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
+ dissect_next_state <= READ_FRAME;
+ else
+ dissect_next_state <= IDLE;
+ end if;
+
+ when READ_FRAME =>
+ state <= x"2";
+ if (PS_DATA_IN(8) = '1') then
+ dissect_next_state <= DECIDE;
+ else
+ dissect_next_state <= READ_FRAME;
+ end if;
+
+ when DECIDE =>
+ state <= x"3";
+ if (saved_target_ip = MY_IP_IN) then
+ dissect_next_state <= WAIT_FOR_LOAD;
+ -- in case the request is not for me, drop it
+ else
+ dissect_next_state <= IDLE;
+ end if;
+
+ when WAIT_FOR_LOAD =>
+ state <= x"4";
+ if (PS_SELECTED_IN = '1') then
+ dissect_next_state <= LOAD_FRAME;
+ else
+ dissect_next_state <= WAIT_FOR_LOAD;
+ end if;
+
+ when LOAD_FRAME =>
+ state <= x"5";
+ if (data_ctr = 28) then
+ dissect_next_state <= CLEANUP;
+ else
+ dissect_next_state <= LOAD_FRAME;
+ end if;
+
+ when CLEANUP =>
+ state <= x"e";
+ dissect_next_state <= IDLE;
+
+ end case;
end process DISSECT_MACHINE;
-DATA_CTR_PROC : process(CLK)
+DATA_CTR_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') or (dissect_current_state = IDLE and PS_WR_EN_IN = '0') then
- data_ctr <= 1;
- elsif (dissect_current_state = WAIT_FOR_LOAD) then
- data_ctr <= 1;
- elsif (dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
- data_ctr <= data_ctr + 1;
- elsif (dissect_current_state = READ_FRAME and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then -- in case of saving data from incoming frame
- data_ctr <= data_ctr + 1;
- elsif (dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1') then -- in case of constructing response
- data_ctr <= data_ctr + 1;
- end if;
- end if;
+ if ( RESET = '1' ) then
+ data_ctr <= 1;
+ elsif( rising_edge(CLK) ) then
+ if ( (dissect_current_state = IDLE) and (PS_WR_EN_IN = '0') ) then
+ data_ctr <= 1;
+ elsif( dissect_current_state = WAIT_FOR_LOAD ) then
+ data_ctr <= 1;
+ elsif( dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
+ data_ctr <= data_ctr + 1;
+ elsif( dissect_current_state = READ_FRAME and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then -- in case of saving data from incoming frame
+ data_ctr <= data_ctr + 1;
+ elsif( dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' ) then -- in case of constructing response
+ data_ctr <= data_ctr + 1;
+ end if;
+ end if;
end process DATA_CTR_PROC;
---TC_WR_PROC : process(CLK)
---begin
--- if rising_edge(CLK) then
--- if (dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1') then
--- tc_wr <= '1';
--- else
--- tc_wr <= '0';
--- end if;
--- end if;
---end process TC_WR_PROC;
-
-SAVE_VALUES_PROC : process(CLK)
+SAVE_VALUES_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') then
- saved_opcode <= (others => '0');
- saved_sender_ip <= (others => '0');
- saved_target_ip <= (others => '0');
- elsif (dissect_current_state = READ_FRAME) then
- case (data_ctr) is
-
- when 6 =>
- saved_opcode(7 downto 0) <= PS_DATA_IN(7 downto 0);
- when 7 =>
- saved_opcode(15 downto 8) <= PS_DATA_IN(7 downto 0);
-
-
- when 13 =>
- saved_sender_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
- when 14 =>
- saved_sender_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
- when 15 =>
- saved_sender_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
- when 16 =>
- saved_sender_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
-
- when 23 =>
- saved_target_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
- when 24 =>
- saved_target_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
- when 25 =>
- saved_target_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
- when 26 =>
- saved_target_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
-
- when others => null;
- end case;
- end if;
- end if;
+ if ( RESET = '1' ) then
+ saved_opcode <= (others => '0');
+ saved_sender_ip <= (others => '0');
+ saved_target_ip <= (others => '0');
+ elsif( rising_edge(CLK) ) then
+ if (dissect_current_state = READ_FRAME) then
+ case (data_ctr) is
+
+ when 6 =>
+ saved_opcode(7 downto 0) <= PS_DATA_IN(7 downto 0);
+ when 7 =>
+ saved_opcode(15 downto 8) <= PS_DATA_IN(7 downto 0);
+ when 13 =>
+ saved_sender_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
+ when 14 =>
+ saved_sender_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
+ when 15 =>
+ saved_sender_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
+ when 16 =>
+ saved_sender_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
+ when 23 =>
+ saved_target_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
+ when 24 =>
+ saved_target_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
+ when 25 =>
+ saved_target_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
+ when 26 =>
+ saved_target_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
+
+ when others => null;
+ end case;
+ end if;
+ end if;
end process SAVE_VALUES_PROC;
-TC_DATA_PROC : process(CLK)
+TC_DATA_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- tc_data(8) <= '0';
-
- if (dissect_current_state = LOAD_FRAME) then
- for i in 0 to 7 loop
- tc_data(i) <= values((data_ctr - 1) * 8 + i);
- end loop;
- -- mark the last byte
- if (data_ctr = 28) then
- tc_data(8) <= '1';
- end if;
- else
- tc_data(7 downto 0) <= (others => '0');
- end if;
-
- TC_DATA_OUT <= tc_data;
-
- end if;
+ if( rising_edge(CLK) ) then
+ tc_data(8) <= '0';
+
+ if (dissect_current_state = LOAD_FRAME) then
+ for i in 0 to 7 loop
+ tc_data(i) <= values((data_ctr - 1) * 8 + i);
+ end loop;
+ -- mark the last byte
+ if (data_ctr = 28) then
+ tc_data(8) <= '1';
+ end if;
+ else
+ tc_data(7 downto 0) <= (others => '0');
+ end if;
+
+ TC_DATA_OUT <= tc_data;
+
+ end if;
end process TC_DATA_PROC;
---TC_WR_EN_OUT <= tc_wr;
-
-PS_RESPONSE_SYNC : process(CLK)
+PS_RESPONSE_SYNC: process( CLK )
begin
- if rising_edge(CLK) then
- if (dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP) then
- PS_RESPONSE_READY_OUT <= '1';
- else
- PS_RESPONSE_READY_OUT <= '0';
- end if;
-
- if (dissect_current_state = IDLE) then
- PS_BUSY_OUT <= '0';
- else
- PS_BUSY_OUT <= '1';
- end if;
- end if;
+ if( rising_edge(CLK) ) then
+ if( dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP ) then
+ PS_RESPONSE_READY_OUT <= '1';
+ else
+ PS_RESPONSE_READY_OUT <= '0';
+ end if;
+
+ if( dissect_current_state = IDLE ) then
+ PS_BUSY_OUT <= '0';
+ else
+ PS_BUSY_OUT <= '1';
+ end if;
+ end if;
end process PS_RESPONSE_SYNC;
-
-
TC_FRAME_SIZE_OUT <= x"001c"; -- fixed frame size
TC_FRAME_TYPE_OUT <= x"0608";
TC_IP_PROTOCOL_OUT <= x"00"; -- doesnt matter
TC_IDENT_OUT <= (others => '0'); -- doesn't matter
-
--- **** statistice
---REC_FRAMES_PROC : process(CLK)
---begin
--- if rising_edge(CLK) then
--- if (RESET = '1') then
--- rec_frames <= (others => '0');
--- elsif (dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
--- rec_frames <= rec_frames + x"1";
--- end if;
--- end if;
---end process REC_FRAMES_PROC;
---
---SENT_FRAMES_PROC : process(CLK)
---begin
--- if rising_edge(CLK) then
--- if (RESET = '1') then
--- sent_frames <= (others => '0');
--- elsif (dissect_current_state = CLEANUP) then
--- sent_frames <= sent_frames + x"1";
--- end if;
--- end if;
---end process SENT_FRAMES_PROC;
---
---RECEIVED_FRAMES_OUT <= rec_frames;
---SENT_FRAMES_OUT <= sent_frames;
---STATS_MACHINE_PROC : process(CLK)
---begin
--- if rising_edge(CLK) then
--- if (RESET = '1') then
--- stats_current_state <= IDLE;
--- else
--- stats_current_state <= stats_next_state;
--- end if;
--- end if;
---end process STATS_MACHINE_PROC;
---
---STATS_MACHINE : process(stats_current_state, PS_WR_EN_IN, PS_ACTIVATE_IN, dissect_current_state)
---begin
---
--- case (stats_current_state) is
---
--- when IDLE =>
--- if (dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') or (dissect_current_state = CLEANUP) then
--- stats_next_state <= LOAD_SENT;
--- else
--- stats_next_state <= IDLE;
--- end if;
---
--- when LOAD_SENT =>
--- if (STAT_DATA_ACK_IN = '1') then
--- stats_next_state <= LOAD_RECEIVED;
--- else
--- stats_next_state <= LOAD_SENT;
--- end if;
---
--- when LOAD_RECEIVED =>
--- if (STAT_DATA_ACK_IN = '1') then
--- stats_next_state <= CLEANUP;
--- else
--- stats_next_state <= LOAD_RECEIVED;
--- end if;
---
--- when CLEANUP =>
--- stats_next_state <= IDLE;
---
--- end case;
---
---end process STATS_MACHINE;
---
---SELECTOR : process(CLK)
---begin
--- if rising_edge(CLK) then
--- case(stats_current_state) is
---
--- when LOAD_SENT =>
--- stat_data_temp <= x"0601" & sent_frames;
--- STAT_ADDR_OUT <= std_logic_vector(to_unsigned(STAT_ADDRESS_BASE, 8));
---
--- when LOAD_RECEIVED =>
--- stat_data_temp <= x"0602" & rec_frames;
--- STAT_ADDR_OUT <= std_logic_vector(to_unsigned(STAT_ADDRESS_BASE + 1, 8));
---
--- when others =>
--- stat_data_temp <= (others => '0');
--- STAT_ADDR_OUT <= (others => '0');
---
--- end case;
--- end if;
---end process SELECTOR;
---
---STAT_DATA_OUT(7 downto 0) <= stat_data_temp(31 downto 24);
---STAT_DATA_OUT(15 downto 8) <= stat_data_temp(23 downto 16);
---STAT_DATA_OUT(23 downto 16) <= stat_data_temp(15 downto 8);
---STAT_DATA_OUT(31 downto 24) <= stat_data_temp(7 downto 0);
---
---STAT_SYNC : process(CLK)
---begin
--- if rising_edge(CLK) then
--- if (stats_current_state /= IDLE and stats_current_state /= CLEANUP) then
--- STAT_DATA_RDY_OUT <= '1';
--- else
--- STAT_DATA_RDY_OUT <= '0';
--- end if;
--- end if;
---end process STAT_SYNC;
-----STAT_DATA_RDY_OUT <= '1' when stats_current_state /= IDLE and stats_current_state /= CLEANUP else '0';
---
----- **** debug
---DEBUG_OUT(3 downto 0) <= state;
---DEBUG_OUT(4) <= '0';
---DEBUG_OUT(7 downto 5) <= "000";
---DEBUG_OUT(8) <= '0';
---DEBUG_OUT(11 downto 9) <= "000";
---DEBUG_OUT(31 downto 12) <= (others => '0');
----- ****
-
end trb_net16_gbe_response_constructor_ARP;
library work;
use work.trb_net_std.all;
use work.trb_net_components.all;
-use work.trb_net16_hub_func.all;
+--use work.trb_net16_hub_func.all;
use work.trb_net_gbe_components.all;
use work.trb_net_gbe_protocols.all;
---********
---
-
entity trb_net16_gbe_response_constructor_DHCP is
-generic (
- STAT_ADDRESS_BASE : integer := 0;
- DO_SIMULATION : integer := 0
-);
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
+port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
-- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_RD_EN_IN : in std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+--
+ TC_RD_EN_IN : in std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-- END OF INTERFACE
-
- MY_IP_OUT : out std_logic_vector(31 downto 0);
- DHCP_START_IN : in std_logic;
- DHCP_DONE_OUT : out std_logic;
-
+ MY_IP_OUT : out std_logic_vector(31 downto 0);
+ DHCP_START_IN : in std_logic;
+ DHCP_DONE_OUT : out std_logic;
-- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
);
end trb_net16_gbe_response_constructor_DHCP;
architecture trb_net16_gbe_response_constructor_DHCP of trb_net16_gbe_response_constructor_DHCP is
---attribute HGROUP : string;
---attribute HGROUP of trb_net16_gbe_response_constructor_DHCP : architecture is "GBE_MAIN_group";
-
-attribute syn_encoding : string;
+attribute syn_encoding : string;
type main_states is (BOOTING, DELAY, SENDING_DISCOVER, WAITING_FOR_OFFER, SENDING_REQUEST, WAITING_FOR_ACK, ESTABLISHED);
signal main_current_state, main_next_state : main_states;
signal construct_current_state, construct_next_state : discover_states;
attribute syn_encoding of construct_current_state: signal is "onehot";
-
type stats_states is (IDLE, LOAD_SENT, LOAD_RECEIVED, LOAD_DISCARDED, CLEANUP);
signal stats_current_state, stats_next_state : stats_states;
attribute syn_encoding of stats_current_state : signal is "onehot";
begin
-
-- ****
-- fixing the constant values for DHCP request headers
-TC_DEST_MAC_OUT <= x"ffffffffffff" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_server_mac;
-TC_DEST_IP_OUT <= x"ffffffff" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_server_ip;
-TC_DEST_UDP_OUT <= x"4300";
-TC_SRC_MAC_OUT <= MY_MAC_IN;
-TC_SRC_IP_OUT <= x"00000000" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_proposed_ip;
-TC_SRC_UDP_OUT <= x"4400";
-TC_IP_PROTOCOL_OUT <= x"11"; -- udp
-bootp_hdr(7 downto 0) <= x"01"; -- message type(request)
-bootp_hdr(15 downto 8) <= x"01"; -- hardware type (eth)
-bootp_hdr(23 downto 16) <= x"06"; -- hardware address length
-bootp_hdr(31 downto 24) <= x"00"; -- hops
-bootp_hdr(63 downto 32) <= transaction_id; -- transaction id;
-bootp_hdr(95 downto 64) <= x"0000_0000"; -- seconds elapsed/flags
-transaction_id <= x"cefa" & MY_MAC_IN(47 downto 40) & MY_MAC_IN(23 downto 16);
+TC_DEST_MAC_OUT <= x"ffffffffffff" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_server_mac;
+TC_DEST_IP_OUT <= x"ffffffff" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_server_ip;
+TC_DEST_UDP_OUT <= x"4300";
+TC_SRC_MAC_OUT <= MY_MAC_IN;
+TC_SRC_IP_OUT <= x"00000000" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_proposed_ip;
+TC_SRC_UDP_OUT <= x"4400";
+TC_IP_PROTOCOL_OUT <= x"11"; -- udp
+bootp_hdr(7 downto 0) <= x"01"; -- message type(request)
+bootp_hdr(15 downto 8) <= x"01"; -- hardware type (eth)
+bootp_hdr(23 downto 16) <= x"06"; -- hardware address length
+bootp_hdr(31 downto 24) <= x"00"; -- hops
+bootp_hdr(63 downto 32) <= transaction_id; -- transaction id;
+bootp_hdr(95 downto 64) <= x"0000_0000"; -- seconds elapsed/flags
+transaction_id <= x"cefa" & MY_MAC_IN(47 downto 40) & MY_MAC_IN(23 downto 16);
vendor_values(31 downto 0) <= x"63538263"; -- magic cookie (dhcp message)
vendor_values(55 downto 32) <= x"010135" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else x"030135"; -- dhcp discover, then dhcp request
vendor_values(79 downto 56) <= x"01073d"; -- client identifier
--*****************
-- setting of global variable for IP address
---g_MY_IP <= saved_true_ip when main_current_state = ESTABLISHED else (others => '0');
my_ip <= saved_true_ip when main_current_state = ESTABLISHED else (others => '0');
MY_IP_OUT <= my_ip;
--
--*****************
-SAVE_SERVER_ADDR_PROC : process(CLK)
+SAVE_SERVER_ADDR_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (main_current_state = BOOTING) then
- saved_server_mac <= (others => '0');
- saved_server_ip <= (others => '0');
- elsif (main_current_state = WAITING_FOR_OFFER) and (receive_current_state = SAVE_VALUES and save_ctr = 1) then
- saved_server_mac <= PS_SRC_MAC_ADDRESS_IN;
- saved_server_ip <= PS_SRC_IP_ADDRESS_IN;
- else
- saved_server_mac <= saved_server_mac;
- saved_server_ip <= saved_server_ip;
- end if;
- end if;
+ if( rising_edge(CLK) ) then
+ if ( main_current_state = BOOTING ) then
+ saved_server_mac <= (others => '0');
+ saved_server_ip <= (others => '0');
+ elsif( (main_current_state = WAITING_FOR_OFFER) and (receive_current_state = SAVE_VALUES and save_ctr = 1) ) then
+ saved_server_mac <= PS_SRC_MAC_ADDRESS_IN;
+ saved_server_ip <= PS_SRC_IP_ADDRESS_IN;
+ end if;
+ end if;
end process SAVE_SERVER_ADDR_PROC;
-- **** MAIN MACHINE PART
-MAIN_MACHINE_PROC : process(RESET, CLK)
+MAIN_MACHINE_PROC: process( CLK, RESET)
begin
- if RESET = '1' then
- main_current_state <= BOOTING;
- elsif rising_edge(CLK) then
- main_current_state <= main_next_state;
- end if;
+ if ( RESET = '1' ) then
+ main_current_state <= BOOTING;
+ elsif( rising_edge(CLK) ) then
+ main_current_state <= main_next_state;
+ end if;
end process MAIN_MACHINE_PROC;
-wait_value <= x"2000_0000" when DO_SIMULATION = 0 else x"0000_0010";
+wait_value <= x"2000_0000";
MAIN_MACHINE : process(main_current_state, DHCP_START_IN, construct_current_state, wait_ctr, receive_current_state, PS_DATA_IN, wait_value)
begin
- state2 <= x"0";
-
- case (main_current_state) is
-
- when BOOTING =>
- state2 <= x"1";
- if (DHCP_START_IN = '1') then
- main_next_state <= DELAY;
- else
- main_next_state <= BOOTING;
- end if;
-
- when DELAY =>
- state2 <= x"2";
- if (wait_ctr = wait_value) then
- main_next_state <= SENDING_DISCOVER;
- else
- main_next_state <= DELAY;
- end if;
-
- when SENDING_DISCOVER =>
- state2 <= x"3";
- if (construct_current_state = CLEANUP) then
- main_next_state <= WAITING_FOR_OFFER;
- else
- main_next_state <= SENDING_DISCOVER;
- end if;
-
- when WAITING_FOR_OFFER =>
- state2 <= x"4";
- if (receive_current_state = SAVE_VALUES) and (PS_DATA_IN(8) = '1') then
- main_next_state <= SENDING_REQUEST;
- elsif (wait_ctr = x"2000_0000") then
- main_next_state <= BOOTING;
- else
- main_next_state <= WAITING_FOR_OFFER;
- end if;
-
- when SENDING_REQUEST =>
- state2 <= x"5";
- if (construct_current_state = CLEANUP) then
- main_next_state <= WAITING_FOR_ACK;
- else
- main_next_state <= SENDING_REQUEST;
- end if;
-
- when WAITING_FOR_ACK =>
- state2 <= x"6";
- if (receive_current_state = SAVE_VALUES) and (PS_DATA_IN(8) = '1') then
- main_next_state <= ESTABLISHED;
- elsif (wait_ctr = x"2000_0000") then
- main_next_state <= BOOTING;
- else
- main_next_state <= WAITING_FOR_ACK;
- end if;
-
- when ESTABLISHED =>
- state2 <= x"7";
--- if (wait_ctr = x"2000_0000") then
--- main_next_state <= SENDING_DISCOVER;
--- else
- main_next_state <= ESTABLISHED;
--- end if;
-
- when others => main_next_state <= BOOTING;
-
- end case;
+ state2 <= x"0";
+
+ case (main_current_state) is
+
+ when BOOTING =>
+ state2 <= x"1";
+ if (DHCP_START_IN = '1') then
+ main_next_state <= DELAY;
+ else
+ main_next_state <= BOOTING;
+ end if;
+
+ when DELAY =>
+ state2 <= x"2";
+ if (wait_ctr = wait_value) then
+ main_next_state <= SENDING_DISCOVER;
+ else
+ main_next_state <= DELAY;
+ end if;
+
+ when SENDING_DISCOVER =>
+ state2 <= x"3";
+ if (construct_current_state = CLEANUP) then
+ main_next_state <= WAITING_FOR_OFFER;
+ else
+ main_next_state <= SENDING_DISCOVER;
+ end if;
+
+ when WAITING_FOR_OFFER =>
+ state2 <= x"4";
+ if (receive_current_state = SAVE_VALUES) and (PS_DATA_IN(8) = '1') then
+ main_next_state <= SENDING_REQUEST;
+ elsif (wait_ctr = x"2000_0000") then
+ main_next_state <= BOOTING;
+ else
+ main_next_state <= WAITING_FOR_OFFER;
+ end if;
+
+ when SENDING_REQUEST =>
+ state2 <= x"5";
+ if (construct_current_state = CLEANUP) then
+ main_next_state <= WAITING_FOR_ACK;
+ else
+ main_next_state <= SENDING_REQUEST;
+ end if;
+
+ when WAITING_FOR_ACK =>
+ state2 <= x"6";
+ if (receive_current_state = SAVE_VALUES) and (PS_DATA_IN(8) = '1') then
+ main_next_state <= ESTABLISHED;
+ elsif (wait_ctr = x"2000_0000") then
+ main_next_state <= BOOTING;
+ else
+ main_next_state <= WAITING_FOR_ACK;
+ end if;
+
+ when ESTABLISHED =>
+ state2 <= x"7";
+-- if (wait_ctr = x"2000_0000") then
+-- main_next_state <= SENDING_DISCOVER;
+-- else
+ main_next_state <= ESTABLISHED;
+-- end if;
+
+ when others => main_next_state <= BOOTING;
+
+ end case;
end process MAIN_MACHINE;
WAIT_CTR_PROC : process(CLK)
begin
- if rising_edge(CLK) then
- if (main_current_state = SENDING_DISCOVER or main_current_state = SENDING_REQUEST or main_current_state = BOOTING) then
- wait_ctr <= (others => '0');
- elsif (main_current_state = WAITING_FOR_ACK and receive_current_state = SAVE_VALUES and PS_DATA_IN(8) = '1') then
- wait_ctr <= (others => '0');
- elsif (main_current_state = WAITING_FOR_ACK or main_current_state = WAITING_FOR_OFFER or main_current_state = DELAY or main_current_state = ESTABLISHED) then
- wait_ctr <= wait_ctr + x"1";
- else
- wait_ctr <= wait_ctr;
- end if;
- end if;
+ if rising_edge(CLK) then
+ if (main_current_state = SENDING_DISCOVER or main_current_state = SENDING_REQUEST or main_current_state = BOOTING) then
+ wait_ctr <= (others => '0');
+ elsif (main_current_state = WAITING_FOR_ACK and receive_current_state = SAVE_VALUES and PS_DATA_IN(8) = '1') then
+ wait_ctr <= (others => '0');
+ elsif (main_current_state = WAITING_FOR_ACK or main_current_state = WAITING_FOR_OFFER or main_current_state = DELAY or main_current_state = ESTABLISHED) then
+ wait_ctr <= wait_ctr + x"1";
+ else
+ wait_ctr <= wait_ctr;
+ end if;
+ end if;
end process WAIT_CTR_PROC;
DHCP_DONE_OUT <= '1' when main_current_state = ESTABLISHED else '0';
RECEIVE_MACHINE_PROC : process(RESET, CLK)
begin
- if RESET = '1' then
- receive_current_state <= IDLE;
- elsif rising_edge(CLK) then
- receive_current_state <= receive_next_state;
- end if;
+ if RESET = '1' then
+ receive_current_state <= IDLE;
+ elsif rising_edge(CLK) then
+ receive_current_state <= receive_next_state;
+ end if;
end process RECEIVE_MACHINE_PROC;
RECEIVE_MACHINE : process(receive_current_state, main_current_state, bootp_hdr, saved_dhcp_type, saved_transaction_id, PS_DATA_IN, PS_DEST_MAC_ADDRESS_IN, MY_MAC_IN, PS_ACTIVATE_IN, PS_WR_EN_IN, save_ctr)
begin
- state3 <= x"0";
-
- case receive_current_state is
-
- when IDLE =>
- state3 <= x"1";
- if (PS_ACTIVATE_IN = '1' and PS_WR_EN_IN = '1') then
- if (main_current_state = WAITING_FOR_OFFER or main_current_state = WAITING_FOR_ACK) then -- ready to receive dhcp frame
- if (PS_DEST_MAC_ADDRESS_IN = MY_MAC_IN) then -- check if i'm the addressee (discards broadcasts also)
- receive_next_state <= SAVE_VALUES;
- else
- receive_next_state <= DISCARD; -- discard if the frame is not for me
- end if;
- else
- receive_next_state <= DISCARD; -- discard if the frame arrived at wrong time
- end if;
- else
- receive_next_state <= IDLE;
- end if;
-
- when SAVE_VALUES =>
- state3 <= x"2";
- if (PS_DATA_IN(8) = '1') then
- receive_next_state <= CLEANUP;
- -- check if the same transaction
- elsif (save_ctr = 9) and (saved_transaction_id /= bootp_hdr(63 downto 32)) then
- receive_next_state <= DISCARD;
- -- if the wrong message at the wrong time
- elsif (main_current_state = WAITING_FOR_OFFER) and (save_ctr = 242) and (saved_dhcp_type /= x"020135") then
- receive_next_state <= DISCARD;
- -- if the wrong message at the wrong time
- elsif (main_current_state = WAITING_FOR_ACK) and (save_ctr = 242) and (saved_dhcp_type /= x"050135") then
- receive_next_state <= DISCARD;
- else
- receive_next_state <= SAVE_VALUES;
- end if;
-
- when DISCARD =>
- state3 <= x"3";
- if (PS_DATA_IN(8) = '1') then
- receive_next_state <= CLEANUP;
- else
- receive_next_state <= DISCARD;
- end if;
-
- when CLEANUP =>
- state3 <= x"4";
- receive_next_state <= IDLE;
-
- when others => receive_next_state <= IDLE;
-
- end case;
+ state3 <= x"0";
+
+ case receive_current_state is
+
+ when IDLE =>
+ state3 <= x"1";
+ if (PS_ACTIVATE_IN = '1' and PS_WR_EN_IN = '1') then
+ if (main_current_state = WAITING_FOR_OFFER or main_current_state = WAITING_FOR_ACK) then -- ready to receive dhcp frame
+ if (PS_DEST_MAC_ADDRESS_IN = MY_MAC_IN) then -- check if i'm the addressee (discards broadcasts also)
+ receive_next_state <= SAVE_VALUES;
+ else
+ receive_next_state <= DISCARD; -- discard if the frame is not for me
+ end if;
+ else
+ receive_next_state <= DISCARD; -- discard if the frame arrived at wrong time
+ end if;
+ else
+ receive_next_state <= IDLE;
+ end if;
+
+ when SAVE_VALUES =>
+ state3 <= x"2";
+ if (PS_DATA_IN(8) = '1') then
+ receive_next_state <= CLEANUP;
+ -- check if the same transaction
+ elsif (save_ctr = 9) and (saved_transaction_id /= bootp_hdr(63 downto 32)) then
+ receive_next_state <= DISCARD;
+ -- if the wrong message at the wrong time
+ elsif (main_current_state = WAITING_FOR_OFFER) and (save_ctr = 242) and (saved_dhcp_type /= x"020135") then
+ receive_next_state <= DISCARD;
+ -- if the wrong message at the wrong time
+ elsif (main_current_state = WAITING_FOR_ACK) and (save_ctr = 242) and (saved_dhcp_type /= x"050135") then
+ receive_next_state <= DISCARD;
+ else
+ receive_next_state <= SAVE_VALUES;
+ end if;
+
+ when DISCARD =>
+ state3 <= x"3";
+ if (PS_DATA_IN(8) = '1') then
+ receive_next_state <= CLEANUP;
+ else
+ receive_next_state <= DISCARD;
+ end if;
+
+ when CLEANUP =>
+ state3 <= x"4";
+ receive_next_state <= IDLE;
+
+ when others => receive_next_state <= IDLE;
+
+ end case;
end process RECEIVE_MACHINE;
SAVE_CTR_PROC : process(CLK)
begin
- if rising_edge(CLK) then
- if (receive_current_state = IDLE) then
- save_ctr <= 0;
- elsif (receive_current_state = SAVE_VALUES and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
- save_ctr <= save_ctr + 1;
- else
- save_ctr <= save_ctr;
- end if;
- end if;
+ if rising_edge(CLK) then
+ if (receive_current_state = IDLE) then
+ save_ctr <= 0;
+ elsif (receive_current_state = SAVE_VALUES and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
+ save_ctr <= save_ctr + 1;
+ else
+ save_ctr <= save_ctr;
+ end if;
+ end if;
end process SAVE_CTR_PROC;
SAVE_VALUES_PROC : process(CLK)
begin
- if rising_edge(CLK) then
- if (main_current_state = BOOTING) then
- saved_transaction_id <= (others => '0');
- saved_proposed_ip <= (others => '0');
- saved_true_ip <= (others => '0');
- saved_dhcp_type <= (others => '0');
- -- dissection of DHCP Offer message
- elsif (main_current_state = WAITING_FOR_OFFER and receive_current_state = SAVE_VALUES) then
-
- saved_true_ip <= saved_true_ip;
-
- case save_ctr is
-
- when 3 =>
- saved_transaction_id(7 downto 0) <= PS_DATA_IN(7 downto 0);
-
- when 4 =>
- saved_transaction_id(15 downto 8) <= PS_DATA_IN(7 downto 0);
-
- when 5 =>
- saved_transaction_id(23 downto 16) <= PS_DATA_IN(7 downto 0);
-
- when 6 =>
- saved_transaction_id(31 downto 24) <= PS_DATA_IN(7 downto 0);
-
-
- when 15 =>
- saved_proposed_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
-
- when 16 =>
- saved_proposed_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
-
- when 17 =>
- saved_proposed_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
-
- when 18 =>
- saved_proposed_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
-
-
- when 239 =>
- saved_dhcp_type(7 downto 0) <= PS_DATA_IN(7 downto 0);
-
- when 240 =>
- saved_dhcp_type(15 downto 8) <= PS_DATA_IN(7 downto 0);
-
- when 241 =>
- saved_dhcp_type(23 downto 16) <= PS_DATA_IN(7 downto 0);
-
- when others => null;
-
- end case;
- -- dissection on DHCP Ack message
- elsif (main_current_state = WAITING_FOR_ACK and receive_current_state = SAVE_VALUES) then
-
- saved_proposed_ip <= saved_proposed_ip;
-
- case save_ctr is
-
- when 3 =>
- saved_transaction_id(7 downto 0) <= PS_DATA_IN(7 downto 0);
-
- when 4 =>
- saved_transaction_id(15 downto 8) <= PS_DATA_IN(7 downto 0);
-
- when 5 =>
- saved_transaction_id(23 downto 16) <= PS_DATA_IN(7 downto 0);
-
- when 6 =>
- saved_transaction_id(31 downto 24) <= PS_DATA_IN(7 downto 0);
-
-
- when 15 =>
- saved_true_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
-
- when 16 =>
- saved_true_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
-
- when 17 =>
- saved_true_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
-
- when 18 =>
- saved_true_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
-
-
- when 239 =>
- saved_dhcp_type(7 downto 0) <= PS_DATA_IN(7 downto 0);
-
- when 240 =>
- saved_dhcp_type(15 downto 8) <= PS_DATA_IN(7 downto 0);
-
- when 241 =>
- saved_dhcp_type(23 downto 16) <= PS_DATA_IN(7 downto 0);
-
- when others => null;
-
- end case;
- else
- saved_transaction_id <= saved_transaction_id;
- saved_proposed_ip <= saved_proposed_ip;
- saved_true_ip <= saved_true_ip;
- saved_dhcp_type <= saved_dhcp_type;
- end if;
- end if;
+ if rising_edge(CLK) then
+ if (main_current_state = BOOTING) then
+ saved_transaction_id <= (others => '0');
+ saved_proposed_ip <= (others => '0');
+ saved_true_ip <= (others => '0');
+ saved_dhcp_type <= (others => '0');
+ -- dissection of DHCP Offer message
+ elsif (main_current_state = WAITING_FOR_OFFER and receive_current_state = SAVE_VALUES) then
+
+ saved_true_ip <= saved_true_ip;
+
+ case save_ctr is
+
+ when 3 =>
+ saved_transaction_id(7 downto 0) <= PS_DATA_IN(7 downto 0);
+
+ when 4 =>
+ saved_transaction_id(15 downto 8) <= PS_DATA_IN(7 downto 0);
+
+ when 5 =>
+ saved_transaction_id(23 downto 16) <= PS_DATA_IN(7 downto 0);
+
+ when 6 =>
+ saved_transaction_id(31 downto 24) <= PS_DATA_IN(7 downto 0);
+
+
+ when 15 =>
+ saved_proposed_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
+
+ when 16 =>
+ saved_proposed_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
+
+ when 17 =>
+ saved_proposed_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
+
+ when 18 =>
+ saved_proposed_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
+
+
+ when 239 =>
+ saved_dhcp_type(7 downto 0) <= PS_DATA_IN(7 downto 0);
+
+ when 240 =>
+ saved_dhcp_type(15 downto 8) <= PS_DATA_IN(7 downto 0);
+
+ when 241 =>
+ saved_dhcp_type(23 downto 16) <= PS_DATA_IN(7 downto 0);
+
+ when others => null;
+
+ end case;
+ -- dissection on DHCP Ack message
+ elsif (main_current_state = WAITING_FOR_ACK and receive_current_state = SAVE_VALUES) then
+
+ saved_proposed_ip <= saved_proposed_ip;
+
+ case save_ctr is
+
+ when 3 =>
+ saved_transaction_id(7 downto 0) <= PS_DATA_IN(7 downto 0);
+
+ when 4 =>
+ saved_transaction_id(15 downto 8) <= PS_DATA_IN(7 downto 0);
+
+ when 5 =>
+ saved_transaction_id(23 downto 16) <= PS_DATA_IN(7 downto 0);
+
+ when 6 =>
+ saved_transaction_id(31 downto 24) <= PS_DATA_IN(7 downto 0);
+
+
+ when 15 =>
+ saved_true_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
+
+ when 16 =>
+ saved_true_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
+
+ when 17 =>
+ saved_true_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
+
+ when 18 =>
+ saved_true_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
+
+
+ when 239 =>
+ saved_dhcp_type(7 downto 0) <= PS_DATA_IN(7 downto 0);
+
+ when 240 =>
+ saved_dhcp_type(15 downto 8) <= PS_DATA_IN(7 downto 0);
+
+ when 241 =>
+ saved_dhcp_type(23 downto 16) <= PS_DATA_IN(7 downto 0);
+
+ when others => null;
+
+ end case;
+ else
+ saved_transaction_id <= saved_transaction_id;
+ saved_proposed_ip <= saved_proposed_ip;
+ saved_true_ip <= saved_true_ip;
+ saved_dhcp_type <= saved_dhcp_type;
+ end if;
+ end if;
end process SAVE_VALUES_PROC;
CONSTRUCT_MACHINE_PROC : process(RESET, CLK)
begin
- if RESET = '1' then
- construct_current_state <= IDLE;
- elsif rising_edge(CLK) then
- if (main_current_state = BOOTING) then
- construct_current_state <= IDLE;
- else
- construct_current_state <= construct_next_state;
- end if;
- end if;
+ if RESET = '1' then
+ construct_current_state <= IDLE;
+ elsif rising_edge(CLK) then
+ if (main_current_state = BOOTING) then
+ construct_current_state <= IDLE;
+ else
+ construct_current_state <= construct_next_state;
+ end if;
+ end if;
end process CONSTRUCT_MACHINE_PROC;
CONSTRUCT_MACHINE : process(construct_current_state, main_current_state, load_ctr, PS_SELECTED_IN)
begin
- state <= x"0";
-
- case construct_current_state is
-
- when IDLE =>
- state <= x"1";
- if (main_current_state = SENDING_DISCOVER) or (main_current_state = SENDING_REQUEST) then
- construct_next_state <= WAIT_FOR_LOAD;
- else
- construct_next_state <= IDLE;
- end if;
-
- when WAIT_FOR_LOAD =>
- state <= x"2";
- if (PS_SELECTED_IN = '1') then
- construct_next_state <= BOOTP_HEADERS;
- else
- construct_next_state <= WAIT_FOR_LOAD;
- end if;
-
-
- when BOOTP_HEADERS =>
- state <= x"3";
- if (load_ctr = 11) then
- construct_next_state <= CLIENT_IP;
- else
- construct_next_state <= BOOTP_HEADERS;
- end if;
-
- when CLIENT_IP =>
- state <= x"4";
- if (load_ctr = 15) then
- construct_next_state <= YOUR_IP;
- else
- construct_next_state <= CLIENT_IP;
- end if;
-
- when YOUR_IP =>
- state <= x"5";
- if (load_ctr = 19) then
- construct_next_state <= ZEROS1;
- else
- construct_next_state <= YOUR_IP;
- end if;
-
- when ZEROS1 =>
- state <= x"6";
- if (load_ctr = 27) then
- construct_next_state <= MY_MAC;
- else
- construct_next_state <= ZEROS1;
- end if;
-
- when MY_MAC =>
- state <= x"7";
- if (load_ctr = 33) then
- construct_next_state <= ZEROS2;
- else
- construct_next_state <= MY_MAC;
- end if;
-
- when ZEROS2 =>
- state <= x"8";
- if (load_ctr = 235) then
- construct_next_state <= VENDOR_VALS;
- else
- construct_next_state <= ZEROS2;
- end if;
-
- when VENDOR_VALS =>
- state <= x"9";
- if (load_ctr = 257) then
- -- for discover it's enough of values
- if (main_current_state = SENDING_DISCOVER) then
- construct_next_state <= TERMINATION;
- -- for request there is some more values needed
- else
- construct_next_state <= VENDOR_VALS2;
- end if;
- else
- construct_next_state <= VENDOR_VALS;
- end if;
-
- when VENDOR_VALS2 =>
- state <= x"a";
- if (load_ctr = 263) then
- construct_next_state <= TERMINATION;
- else
- construct_next_state <= VENDOR_VALS2;
- end if;
-
- when TERMINATION =>
- state <= x"b";
- construct_next_state <= CLEANUP;
-
- when CLEANUP =>
- state <= x"c";
- construct_next_state <= IDLE;
-
- when others => construct_next_state <= IDLE;
-
- end case;
+ state <= x"0";
+
+ case construct_current_state is
+
+ when IDLE =>
+ state <= x"1";
+ if (main_current_state = SENDING_DISCOVER) or (main_current_state = SENDING_REQUEST) then
+ construct_next_state <= WAIT_FOR_LOAD;
+ else
+ construct_next_state <= IDLE;
+ end if;
+
+ when WAIT_FOR_LOAD =>
+ state <= x"2";
+ if (PS_SELECTED_IN = '1') then
+ construct_next_state <= BOOTP_HEADERS;
+ else
+ construct_next_state <= WAIT_FOR_LOAD;
+ end if;
+
+
+ when BOOTP_HEADERS =>
+ state <= x"3";
+ if (load_ctr = 11) then
+ construct_next_state <= CLIENT_IP;
+ else
+ construct_next_state <= BOOTP_HEADERS;
+ end if;
+
+ when CLIENT_IP =>
+ state <= x"4";
+ if (load_ctr = 15) then
+ construct_next_state <= YOUR_IP;
+ else
+ construct_next_state <= CLIENT_IP;
+ end if;
+
+ when YOUR_IP =>
+ state <= x"5";
+ if (load_ctr = 19) then
+ construct_next_state <= ZEROS1;
+ else
+ construct_next_state <= YOUR_IP;
+ end if;
+
+ when ZEROS1 =>
+ state <= x"6";
+ if (load_ctr = 27) then
+ construct_next_state <= MY_MAC;
+ else
+ construct_next_state <= ZEROS1;
+ end if;
+
+ when MY_MAC =>
+ state <= x"7";
+ if (load_ctr = 33) then
+ construct_next_state <= ZEROS2;
+ else
+ construct_next_state <= MY_MAC;
+ end if;
+
+ when ZEROS2 =>
+ state <= x"8";
+ if (load_ctr = 235) then
+ construct_next_state <= VENDOR_VALS;
+ else
+ construct_next_state <= ZEROS2;
+ end if;
+
+ when VENDOR_VALS =>
+ state <= x"9";
+ if (load_ctr = 257) then
+ -- for discover it's enough of values
+ if (main_current_state = SENDING_DISCOVER) then
+ construct_next_state <= TERMINATION;
+ -- for request there is some more values needed
+ else
+ construct_next_state <= VENDOR_VALS2;
+ end if;
+ else
+ construct_next_state <= VENDOR_VALS;
+ end if;
+
+ when VENDOR_VALS2 =>
+ state <= x"a";
+ if (load_ctr = 263) then
+ construct_next_state <= TERMINATION;
+ else
+ construct_next_state <= VENDOR_VALS2;
+ end if;
+
+ when TERMINATION =>
+ state <= x"b";
+ construct_next_state <= CLEANUP;
+
+ when CLEANUP =>
+ state <= x"c";
+ construct_next_state <= IDLE;
+
+ when others => construct_next_state <= IDLE;
+
+ end case;
end process CONSTRUCT_MACHINE;
LOAD_CTR_PROC : process(CLK)
begin
- if rising_edge(CLK) then
- if (construct_current_state = IDLE) then
- load_ctr <= 0;
- elsif (TC_RD_EN_IN = '1') and (PS_SELECTED_IN = '1') then
- load_ctr <= load_ctr + 1;
- else
- load_ctr <= load_ctr;
- end if;
- end if;
+ if rising_edge(CLK) then
+ if (construct_current_state = IDLE) then
+ load_ctr <= 0;
+ elsif (TC_RD_EN_IN = '1') and (PS_SELECTED_IN = '1') then
+ load_ctr <= load_ctr + 1;
+ else
+ load_ctr <= load_ctr;
+ end if;
+ end if;
end process LOAD_CTR_PROC;
TC_DATA_PROC : process(CLK)
begin
- if rising_edge(CLK) then
- case (construct_current_state) is
-
- when BOOTP_HEADERS =>
- for i in 0 to 7 loop
- tc_data(i) <= bootp_hdr(load_ctr * 8 + i);
- end loop;
- tc_data(8) <= '0';
-
- when CLIENT_IP =>
- if (main_current_state = SENDING_DISCOVER) then
- tc_data(7 downto 0) <= x"00";
- elsif (main_current_state = SENDING_REQUEST) then
- for i in 0 to 7 loop
- tc_data(i) <= saved_proposed_ip((load_ctr - 12) * 8 + i);
- end loop;
- end if;
- tc_data(8) <= '0';
-
- when YOUR_IP =>
- tc_data(7 downto 0) <= x"00";
- tc_data(8) <= '0';
-
- when ZEROS1 =>
- tc_data(7 downto 0) <= x"00";
- tc_data(8) <= '0';
-
- when MY_MAC =>
- for i in 0 to 7 loop
- tc_data(i) <= MY_MAC_IN((load_ctr - 28) * 8 + i);
- end loop;
- tc_data(8) <= '0';
-
- when ZEROS2 =>
- tc_data(7 downto 0) <= x"00";
- tc_data(8) <= '0';
-
- when VENDOR_VALS =>
- for i in 0 to 7 loop
- tc_data(i) <= vendor_values((load_ctr - 236) * 8 + i);
- end loop;
- tc_data(8) <= '0';
-
- -- needed only for DHCP Request message
- when VENDOR_VALS2 =>
- for i in 0 to 7 loop
- tc_data(i) <= vendor_values2((load_ctr - 258) * 8 + i);
- end loop;
- tc_data(8) <= '0';
-
- when TERMINATION =>
- tc_data(7 downto 0) <= x"ff";
- tc_data(8) <= '1';
-
- when others =>
- tc_data(7 downto 0) <= x"00";
- tc_data(8) <= '0';
-
- end case;
-
- TC_DATA_OUT <= tc_data;
-
- end if;
+ if rising_edge(CLK) then
+ case (construct_current_state) is
+
+ when BOOTP_HEADERS =>
+ for i in 0 to 7 loop
+ tc_data(i) <= bootp_hdr(load_ctr * 8 + i);
+ end loop;
+ tc_data(8) <= '0';
+
+ when CLIENT_IP =>
+ if (main_current_state = SENDING_DISCOVER) then
+ tc_data(7 downto 0) <= x"00";
+ elsif (main_current_state = SENDING_REQUEST) then
+ for i in 0 to 7 loop
+ tc_data(i) <= saved_proposed_ip((load_ctr - 12) * 8 + i);
+ end loop;
+ end if;
+ tc_data(8) <= '0';
+
+ when YOUR_IP =>
+ tc_data(7 downto 0) <= x"00";
+ tc_data(8) <= '0';
+
+ when ZEROS1 =>
+ tc_data(7 downto 0) <= x"00";
+ tc_data(8) <= '0';
+
+ when MY_MAC =>
+ for i in 0 to 7 loop
+ tc_data(i) <= MY_MAC_IN((load_ctr - 28) * 8 + i);
+ end loop;
+ tc_data(8) <= '0';
+
+ when ZEROS2 =>
+ tc_data(7 downto 0) <= x"00";
+ tc_data(8) <= '0';
+
+ when VENDOR_VALS =>
+ for i in 0 to 7 loop
+ tc_data(i) <= vendor_values((load_ctr - 236) * 8 + i);
+ end loop;
+ tc_data(8) <= '0';
+
+ -- needed only for DHCP Request message
+ when VENDOR_VALS2 =>
+ for i in 0 to 7 loop
+ tc_data(i) <= vendor_values2((load_ctr - 258) * 8 + i);
+ end loop;
+ tc_data(8) <= '0';
+
+ when TERMINATION =>
+ tc_data(7 downto 0) <= x"ff";
+ tc_data(8) <= '1';
+
+ when others =>
+ tc_data(7 downto 0) <= x"00";
+ tc_data(8) <= '0';
+
+ end case;
+
+ TC_DATA_OUT <= tc_data;
+
+ end if;
end process;
PS_RESPONSE_SYNC : process(CLK)
begin
- if rising_edge(CLK) then
- if (construct_current_state = IDLE or construct_current_state = CLEANUP) then
- PS_RESPONSE_READY_OUT <= '0';
- else
- PS_RESPONSE_READY_OUT <= '1';
- end if;
-
- if (construct_current_state = IDLE) then
- PS_BUSY_OUT <= '0';
- else
- PS_BUSY_OUT <= '1';
- end if;
- end if;
+ if rising_edge(CLK) then
+ if (construct_current_state = IDLE or construct_current_state = CLEANUP) then
+ PS_RESPONSE_READY_OUT <= '0';
+ else
+ PS_RESPONSE_READY_OUT <= '1';
+ end if;
+
+ if (construct_current_state = IDLE) then
+ PS_BUSY_OUT <= '0';
+ else
+ PS_BUSY_OUT <= '1';
+ end if;
+ end if;
end process PS_RESPONSE_SYNC;
-- fixed sizes for discover and request messages
-- **** statistics
--REC_FRAMES_PROC : process(CLK)
--begin
--- if rising_edge(CLK) then
--- if (RESET = '1') then
--- rec_frames <= (others => '0');
--- elsif (receive_current_state = SAVE_VALUES and PS_DATA_IN(8) = '1') then
--- rec_frames <= rec_frames + x"1";
--- end if;
--- end if;
+-- if rising_edge(CLK) then
+-- if (RESET = '1') then
+-- rec_frames <= (others => '0');
+-- elsif (receive_current_state = SAVE_VALUES and PS_DATA_IN(8) = '1') then
+-- rec_frames <= rec_frames + x"1";
+-- end if;
+-- end if;
--end process REC_FRAMES_PROC;
--
-- needed for identification
SENT_FRAMES_PROC : process(CLK)
begin
- if rising_edge(CLK) then
- if (RESET = '1') then
- sent_frames <= (others => '0');
- elsif (construct_current_state = CLEANUP) then
- sent_frames <= sent_frames + x"1";
- end if;
- end if;
+ if rising_edge(CLK) then
+ if (RESET = '1') then
+ sent_frames <= (others => '0');
+ elsif (construct_current_state = CLEANUP) then
+ sent_frames <= sent_frames + x"1";
+ end if;
+ end if;
end process SENT_FRAMES_PROC;
-- **** debug
process(CLK)
begin
- if rising_edge(CLK) then
- DEBUG_OUT(3 downto 0) <= state;
- DEBUG_OUT(7 downto 4) <= state2;
- DEBUG_OUT(11 downto 8) <= state3;
- end if;
+ if rising_edge(CLK) then
+ DEBUG_OUT(3 downto 0) <= state;
+ DEBUG_OUT(7 downto 4) <= state2;
+ DEBUG_OUT(11 downto 8) <= state3;
+ end if;
end process;
-- ****
library work;
use work.trb_net_std.all;
use work.trb_net_components.all;
-use work.trb_net16_hub_func.all;
+--use work.trb_net16_hub_func.all;
-use work.trb_net_gbe_components.all;
+--use work.trb_net_gbe_components.all;
--********
-- Response Constructor which forwards received frame back creating a loopback
begin
-DISSECT_MACHINE_PROC : process(CLK)
+DISSECT_MACHINE_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') then
- dissect_current_state <= IDLE;
- else
- dissect_current_state <= dissect_next_state;
- end if;
+ if( RESET = '1' ) then
+ dissect_current_state <= IDLE;
+ elsif( rising_edge(CLK) ) then
+ dissect_current_state <= dissect_next_state;
end if;
end process DISSECT_MACHINE_PROC;
-DISSECT_MACHINE : process(dissect_current_state, FWD_SOP_IN, FWD_EOP_IN, ff_q, ff_rd_lock, PS_SELECTED_IN)
+DISSECT_MACHINE: process(dissect_current_state, FWD_SOP_IN, FWD_EOP_IN, ff_q, ff_rd_lock, PS_SELECTED_IN)
begin
case dissect_current_state is
local_eop <= '1' when (dissect_current_state = SAVE and FWD_EOP_IN = '1' and FWD_DATA_VALID_IN = '1') else '0';
-FF_RD_LOCK_PROC : process(CLK)
+FF_RD_LOCK_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') then
- ff_rd_lock <= '1';
- elsif (dissect_current_state = LOAD and ff_rd_en = '1') then
+ if ( RESET = '1' ) then
+ ff_rd_lock <= '1';
+ elsif( rising_edge(CLK) ) then
+ if( dissect_current_state = LOAD and ff_rd_en = '1' ) then
ff_rd_lock <= '0';
else
ff_rd_lock <= '1';
end if;
end process FF_RD_LOCK_PROC;
-FRAME_FIFO: fifo_4096x9
+FRAME_FIFO: entity fifo_4096x9
port map(
Data(7 downto 0) => FWD_DATA_IN,
Data(8) => local_eop,
--TC_FRAME_SIZE_OUT <= resp_bytes_ctr + x"1"; -- BUG?!?
TC_FRAME_SIZE_OUT <= resp_bytes_ctr;
-TC_FRAME_TYPE_OUT <= x"0008";
-TC_DEST_MAC_OUT <= FWD_DST_MAC_IN;
-TC_DEST_IP_OUT <= FWD_DST_IP_IN;
-TC_DEST_UDP_OUT <= FWD_DST_UDP_IN;
-TC_SRC_MAC_OUT <= MY_MAC_IN;
-TC_SRC_IP_OUT <= MY_IP_IN;
-TC_SRC_UDP_OUT <= FWD_DST_UDP_IN;
+TC_FRAME_TYPE_OUT <= x"0008";
+TC_DEST_MAC_OUT <= FWD_DST_MAC_IN;
+TC_DEST_IP_OUT <= FWD_DST_IP_IN;
+TC_DEST_UDP_OUT <= FWD_DST_UDP_IN;
+TC_SRC_MAC_OUT <= MY_MAC_IN;
+TC_SRC_IP_OUT <= MY_IP_IN;
+TC_SRC_UDP_OUT <= FWD_DST_UDP_IN;
TC_IP_PROTOCOL_OUT <= x"11";
TC_IDENT_OUT <= x"6" & sent_frames(11 downto 0);
-RESP_BYTES_CTR_PROC : process(CLK)
+RESP_BYTES_CTR_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') or (dissect_current_state = IDLE) then
+ if ( RESET = '1' ) then
+ resp_bytes_ctr <= (others => '0');
+ elsif( rising_edge(CLK) ) then
+ if ( dissect_current_state = IDLE ) then
resp_bytes_ctr <= (others => '0');
- elsif (dissect_current_state = SAVE and FWD_DATA_VALID_IN = '1') then
+ elsif( dissect_current_state = SAVE and FWD_DATA_VALID_IN = '1' ) then
resp_bytes_ctr <= resp_bytes_ctr + x"1";
end if;
FWD_FULL_OUT <= ff_full;
- if (dissect_current_state = IDLE) then
+ if( dissect_current_state = IDLE ) then
FWD_READY_OUT <= '1';
else
FWD_READY_OUT <= '0';
end if;
end process RESP_BYTES_CTR_PROC;
-REC_FRAMES_PROC : process(CLK)
+REC_FRAMES_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') then
- rec_frames <= (others => '0');
- elsif (dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
+ if ( RESET = '1' ) then
+ rec_frames <= (others => '0');
+ elsif( rising_edge(CLK) ) then
+ if( dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
rec_frames <= rec_frames + x"1";
end if;
end if;
end process REC_FRAMES_PROC;
-SENT_FRAMES_PROC : process(CLK)
+SENT_FRAMES_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') then
- sent_frames <= (others => '0');
- elsif (dissect_current_state = WAIT_FOR_LOAD and PS_SELECTED_IN = '0') then
+ if ( RESET = '1' ) then
+ sent_frames <= (others => '0');
+ elsif( rising_edge(CLK) ) then
+ if( dissect_current_state = WAIT_FOR_LOAD and PS_SELECTED_IN = '0' ) then
sent_frames <= sent_frames + x"1";
end if;
end if;
-- ****
end trb_net16_gbe_response_constructor_Forward;
-
-
use work.trb_net_gbe_components.all;
use work.trb_net_gbe_protocols.all;
---********
--- Response Constructor which responds to Ping messages
---
-
entity trb_net16_gbe_response_constructor_Ping is
-generic ( STAT_ADDRESS_BASE : integer := 0
-);
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_RD_EN_IN : in std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
-
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+-- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+--
+ TC_RD_EN_IN : in std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-- END OF INTERFACE
-
-- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
);
end trb_net16_gbe_response_constructor_Ping;
architecture trb_net16_gbe_response_constructor_Ping of trb_net16_gbe_response_constructor_Ping is
-attribute syn_encoding : string;
+attribute syn_encoding : string;
type dissect_states is (IDLE, READ_FRAME, WAIT_FOR_LOAD, LOAD_FRAME, CLEANUP);
signal dissect_current_state, dissect_next_state : dissect_states;
signal stats_current_state, stats_next_state : stats_states;
attribute syn_encoding of stats_current_state : signal is "onehot";
-signal sent_frames : std_logic_vector(15 downto 0);
+signal sent_frames : std_logic_vector(15 downto 0);
-signal saved_data : std_logic_vector(447 downto 0);
-signal saved_headers : std_logic_vector(63 downto 0);
+signal saved_data : std_logic_vector(447 downto 0);
+signal saved_headers : std_logic_vector(63 downto 0);
-signal data_ctr : integer range 1 to 1500;
-signal data_length : integer range 1 to 1500;
-signal tc_data : std_logic_vector(8 downto 0);
+signal data_ctr : integer range 1 to 1500;
+signal data_length : integer range 1 to 1500;
+signal tc_data : std_logic_vector(8 downto 0);
-signal checksum : std_logic_vector(15 downto 0);
+signal checksum : std_logic_vector(15 downto 0);
-signal checksum_l, checksum_r : std_logic_vector(19 downto 0);
-signal checksum_ll, checksum_rr : std_logic_vector(15 downto 0);
-signal checksum_lll, checksum_rrr : std_logic_vector(15 downto 0);
+signal checksum_l : std_logic_vector(19 downto 0);
+signal checksum_r : std_logic_vector(19 downto 0);
+signal checksum_ll : std_logic_vector(15 downto 0);
+signal checksum_rr : std_logic_vector(15 downto 0);
+signal checksum_lll : std_logic_vector(15 downto 0);
+signal checksum_rrr : std_logic_vector(15 downto 0);
begin
-DISSECT_MACHINE_PROC : process(RESET, CLK)
+DISSECT_MACHINE_PROC: process( CLK, RESET )
begin
- if RESET = '1' then
- dissect_current_state <= IDLE;
- elsif rising_edge(CLK) then
- dissect_current_state <= dissect_next_state;
- end if;
+ if ( RESET = '1' ) then
+ dissect_current_state <= IDLE;
+ elsif( rising_edge(CLK) ) then
+ dissect_current_state <= dissect_next_state;
+ end if;
end process DISSECT_MACHINE_PROC;
-DISSECT_MACHINE : process(dissect_current_state, PS_WR_EN_IN, PS_SELECTED_IN, PS_ACTIVATE_IN, PS_DATA_IN, data_ctr, data_length)
+DISSECT_MACHINE: process(dissect_current_state, PS_WR_EN_IN, PS_SELECTED_IN, PS_ACTIVATE_IN, PS_DATA_IN, data_ctr, data_length)
begin
- case dissect_current_state is
-
- when IDLE =>
- if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
- dissect_next_state <= READ_FRAME;
- else
- dissect_next_state <= IDLE;
- end if;
-
- when READ_FRAME =>
- if (PS_DATA_IN(8) = '1') then
- dissect_next_state <= WAIT_FOR_LOAD;
- else
- dissect_next_state <= READ_FRAME;
- end if;
-
- when WAIT_FOR_LOAD =>
- if (PS_SELECTED_IN = '1') then
- dissect_next_state <= LOAD_FRAME;
- else
- dissect_next_state <= WAIT_FOR_LOAD;
- end if;
-
- when LOAD_FRAME =>
- if (data_ctr = data_length + 1) then
- dissect_next_state <= CLEANUP;
- else
- dissect_next_state <= LOAD_FRAME;
- end if;
-
- when CLEANUP =>
- dissect_next_state <= IDLE;
-
- end case;
+ case dissect_current_state is
+
+ when IDLE =>
+ if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
+ dissect_next_state <= READ_FRAME;
+ else
+ dissect_next_state <= IDLE;
+ end if;
+
+ when READ_FRAME =>
+ if (PS_DATA_IN(8) = '1') then
+ dissect_next_state <= WAIT_FOR_LOAD;
+ else
+ dissect_next_state <= READ_FRAME;
+ end if;
+
+ when WAIT_FOR_LOAD =>
+ if (PS_SELECTED_IN = '1') then
+ dissect_next_state <= LOAD_FRAME;
+ else
+ dissect_next_state <= WAIT_FOR_LOAD;
+ end if;
+
+ when LOAD_FRAME =>
+ if (data_ctr = data_length + 1) then
+ dissect_next_state <= CLEANUP;
+ else
+ dissect_next_state <= LOAD_FRAME;
+ end if;
+
+ when CLEANUP =>
+ dissect_next_state <= IDLE;
+
+ end case;
end process DISSECT_MACHINE;
-DATA_CTR_PROC : process(CLK)
+DATA_CTR_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') or (dissect_current_state = IDLE) or (dissect_current_state = WAIT_FOR_LOAD) then
- data_ctr <= 2;
- elsif (dissect_current_state = READ_FRAME and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then -- in case of saving data from incoming frame
- data_ctr <= data_ctr + 1;
- elsif (dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1') then -- in case of constructing response
- data_ctr <= data_ctr + 1;
- end if;
- end if;
+ if ( RESET = '1' ) then
+ data_ctr <= 2;
+ elsif( rising_edge(CLK) ) then
+ if ( (dissect_current_state = IDLE) or (dissect_current_state = WAIT_FOR_LOAD) ) then
+ data_ctr <= 2;
+ elsif( dissect_current_state = READ_FRAME and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then -- in case of saving data from incoming frame
+ data_ctr <= data_ctr + 1;
+ elsif( dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' ) then -- in case of constructing response
+ data_ctr <= data_ctr + 1;
+ end if;
+ end if;
end process DATA_CTR_PROC;
-DATA_LENGTH_PROC: process(CLK)
+DATA_LENGTH_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') then
- data_length <= 1;
- elsif (dissect_current_state = READ_FRAME and PS_DATA_IN(8) = '1') then
- data_length <= data_ctr;
- end if;
- end if;
+ if ( RESET = '1' ) then
+ data_length <= 1;
+ elsif( rising_edge(CLK) ) then
+ if (dissect_current_state = READ_FRAME and PS_DATA_IN(8) = '1') then
+ data_length <= data_ctr;
+ end if;
+ end if;
end process DATA_LENGTH_PROC;
-SAVE_VALUES_PROC : process(CLK)
+SAVE_VALUES_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') or (dissect_current_state = IDLE) then
- saved_headers <= (others => '0');
- saved_data <= (others => '0');
- elsif (dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
- saved_headers(7 downto 0) <= PS_DATA_IN(7 downto 0);
- elsif (dissect_current_state = READ_FRAME) then
- if (data_ctr < 9) then -- headers
- saved_headers(data_ctr * 8 - 1 downto (data_ctr - 1) * 8) <= PS_DATA_IN(7 downto 0);
- elsif (data_ctr > 8) then -- data
- saved_data((data_ctr - 8) * 8 - 1 downto (data_ctr - 8 - 1) * 8) <= PS_DATA_IN(7 downto 0);
- end if;
- elsif (dissect_current_state = LOAD_FRAME) then
- saved_headers(7 downto 0) <= x"00";
- saved_headers(23 downto 16) <= checksum(7 downto 0);
- saved_headers(31 downto 24) <= checksum(15 downto 8);
- end if;
- end if;
+ if ( RESET = '1' ) then
+ saved_headers <= (others => '0');
+ saved_data <= (others => '0');
+ elsif( rising_edge(CLK) ) then
+ if ( dissect_current_state = IDLE ) then
+ saved_headers <= (others => '0');
+ saved_data <= (others => '0');
+ elsif( dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
+ saved_headers(7 downto 0) <= PS_DATA_IN(7 downto 0);
+ elsif( dissect_current_state = READ_FRAME ) then
+ if (data_ctr < 9) then -- headers
+ saved_headers(data_ctr * 8 - 1 downto (data_ctr - 1) * 8) <= PS_DATA_IN(7 downto 0);
+ elsif (data_ctr > 8) then -- data
+ saved_data((data_ctr - 8) * 8 - 1 downto (data_ctr - 8 - 1) * 8) <= PS_DATA_IN(7 downto 0);
+ end if;
+ elsif( dissect_current_state = LOAD_FRAME ) then
+ saved_headers(7 downto 0) <= x"00";
+ saved_headers(23 downto 16) <= checksum(7 downto 0);
+ saved_headers(31 downto 24) <= checksum(15 downto 8);
+ end if;
+ end if;
end process SAVE_VALUES_PROC;
-CS_PROC : process(CLK)
+CS_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') or (dissect_current_state = IDLE) then
- checksum_l(19 downto 0) <= (others => '0');
- checksum_r(19 downto 0) <= (others => '0');
- checksum_ll(15 downto 0) <= (others => '0');
- checksum_rr(15 downto 0) <= (others => '0');
- checksum_lll(15 downto 0) <= (others => '0');
- checksum_rrr(15 downto 0) <= (others => '0');
- elsif (dissect_current_state = READ_FRAME and data_ctr > 4) then
- if (std_logic_vector(to_unsigned(data_ctr, 1)) = "0") then
- checksum_l <= checksum_l + PS_DATA_IN(7 downto 0);
- else
- checksum_r <= checksum_r + PS_DATA_IN(7 downto 0);
- end if;
- checksum_ll <= checksum_ll;
- checksum_lll <= checksum_lll;
- checksum_rr <= checksum_rr;
- checksum_rrr <= checksum_rrr;
- elsif (dissect_current_state = WAIT_FOR_LOAD) then
- checksum_ll <= x"0000" + checksum_l(7 downto 0) + checksum_r(19 downto 8);
- checksum_rr <= x"0000" + checksum_r(7 downto 0) + checksum_l(19 downto 8);
- checksum_l <= checksum_l;
- checksum_lll <= checksum_lll;
- checksum_r <= checksum_r;
- checksum_rrr <= checksum_rrr;
- elsif (dissect_current_state = LOAD_FRAME and data_ctr = 2) then
- checksum_lll <= x"0000" + checksum_ll(7 downto 0) + checksum_rr(15 downto 8);
- checksum_rrr <= x"0000" + checksum_rr(7 downto 0) + checksum_ll(15 downto 8);
- checksum_l <= checksum_l;
- checksum_ll <= checksum_ll;
- checksum_r <= checksum_r;
- checksum_rr <= checksum_rr;
- else
- checksum_l <= checksum_l;
- checksum_ll <= checksum_ll;
- checksum_lll <= checksum_lll;
- checksum_r <= checksum_r;
- checksum_rr <= checksum_rr;
- checksum_rrr <= checksum_rrr;
- end if;
- end if;
+ if ( RESET = '1' ) then
+ checksum_l(19 downto 0) <= (others => '0');
+ checksum_r(19 downto 0) <= (others => '0');
+ checksum_ll(15 downto 0) <= (others => '0');
+ checksum_rr(15 downto 0) <= (others => '0');
+ checksum_lll(15 downto 0) <= (others => '0');
+ checksum_rrr(15 downto 0) <= (others => '0');
+ elsif( rising_edge(CLK) ) then
+ if( dissect_current_state = IDLE ) then
+ checksum_l(19 downto 0) <= (others => '0');
+ checksum_r(19 downto 0) <= (others => '0');
+ checksum_ll(15 downto 0) <= (others => '0');
+ checksum_rr(15 downto 0) <= (others => '0');
+ checksum_lll(15 downto 0) <= (others => '0');
+ checksum_rrr(15 downto 0) <= (others => '0');
+ elsif( dissect_current_state = READ_FRAME and data_ctr > 4 ) then
+ if (std_logic_vector(to_unsigned(data_ctr, 1)) = "0") then
+ checksum_l <= checksum_l + PS_DATA_IN(7 downto 0);
+ else
+ checksum_r <= checksum_r + PS_DATA_IN(7 downto 0);
+ end if;
+ checksum_ll <= checksum_ll;
+ checksum_lll <= checksum_lll;
+ checksum_rr <= checksum_rr;
+ checksum_rrr <= checksum_rrr;
+ elsif( dissect_current_state = WAIT_FOR_LOAD ) then
+ checksum_ll <= x"0000" + checksum_l(7 downto 0) + checksum_r(19 downto 8);
+ checksum_rr <= x"0000" + checksum_r(7 downto 0) + checksum_l(19 downto 8);
+ checksum_l <= checksum_l;
+ checksum_lll <= checksum_lll;
+ checksum_r <= checksum_r;
+ checksum_rrr <= checksum_rrr;
+ elsif( dissect_current_state = LOAD_FRAME and data_ctr = 2 ) then
+ checksum_lll <= x"0000" + checksum_ll(7 downto 0) + checksum_rr(15 downto 8);
+ checksum_rrr <= x"0000" + checksum_rr(7 downto 0) + checksum_ll(15 downto 8);
+ checksum_l <= checksum_l;
+ checksum_ll <= checksum_ll;
+ checksum_r <= checksum_r;
+ checksum_rr <= checksum_rr;
+ end if;
+ end if;
end process CS_PROC;
checksum(7 downto 0) <= not (checksum_rrr(7 downto 0) + checksum_lll(15 downto 8));
checksum(15 downto 8) <= not (checksum_lll(7 downto 0) + checksum_rrr(15 downto 8));
-TC_DATA_PROC : process(CLK)
+TC_DATA_PROC : process( CLK )
begin
- if rising_edge(CLK) then
- tc_data(8) <= '0';
-
- if (dissect_current_state = LOAD_FRAME) then
- if (data_ctr < 10) then -- headers
- for i in 0 to 7 loop
- tc_data(i) <= saved_headers((data_ctr - 2) * 8 + i);
- end loop;
- else -- data
- for i in 0 to 7 loop
- tc_data(i) <= saved_data((data_ctr - 8 - 2) * 8 + i);
- end loop;
-
- -- mark the last byte
- if (data_ctr = data_length + 1) then
- tc_data(8) <= '1';
- end if;
- end if;
- else
- tc_data(7 downto 0) <= (others => '0');
- end if;
-
- TC_DATA_OUT <= tc_data;
-
- end if;
+ if( rising_edge(CLK) ) then
+ tc_data(8) <= '0';
+
+ if( dissect_current_state = LOAD_FRAME ) then
+ if (data_ctr < 10) then -- headers
+ for i in 0 to 7 loop
+ tc_data(i) <= saved_headers((data_ctr - 2) * 8 + i);
+ end loop;
+ else -- data
+ for i in 0 to 7 loop
+ tc_data(i) <= saved_data((data_ctr - 8 - 2) * 8 + i);
+ end loop;
+
+ -- mark the last byte
+ if (data_ctr = data_length + 1) then
+ tc_data(8) <= '1';
+ end if;
+ end if;
+ else
+ tc_data(7 downto 0) <= (others => '0');
+ end if;
+
+ TC_DATA_OUT <= tc_data;
+
+ end if;
end process TC_DATA_PROC;
-PS_RESPONSE_SYNC : process(CLK)
+PS_RESPONSE_SYNC: process( CLK )
begin
- if rising_edge(CLK) then
- if (dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP) then
- PS_RESPONSE_READY_OUT <= '1';
- else
- PS_RESPONSE_READY_OUT <= '0';
- end if;
-
- if (dissect_current_state = IDLE) then
- PS_BUSY_OUT <= '0';
- else
- PS_BUSY_OUT <= '1';
- end if;
- end if;
+ if( rising_edge(CLK) ) then
+ if( dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP ) then
+ PS_RESPONSE_READY_OUT <= '1';
+ else
+ PS_RESPONSE_READY_OUT <= '0';
+ end if;
+
+ if( dissect_current_state = IDLE ) then
+ PS_BUSY_OUT <= '0';
+ else
+ PS_BUSY_OUT <= '1';
+ end if;
+ end if;
end process PS_RESPONSE_SYNC;
TC_FRAME_SIZE_OUT <= std_logic_vector(to_unsigned(data_length, 16));
TC_IP_PROTOCOL_OUT <= X"01"; -- ICMP
TC_IDENT_OUT <= x"2" & sent_frames(11 downto 0);
-ADDR_PROC : process(CLK)
+ADDR_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (dissect_current_state = READ_FRAME) then
- TC_DEST_MAC_OUT <= PS_SRC_MAC_ADDRESS_IN;
- TC_DEST_IP_OUT <= PS_SRC_IP_ADDRESS_IN;
- end if;
- end if;
+ if( rising_edge(CLK) ) then
+ if( dissect_current_state = READ_FRAME ) then
+ TC_DEST_MAC_OUT <= PS_SRC_MAC_ADDRESS_IN;
+ TC_DEST_IP_OUT <= PS_SRC_IP_ADDRESS_IN;
+ end if;
+ end if;
end process ADDR_PROC;
--- statistics
---
---REC_FRAMES_PROC : process(CLK)
---begin
--- if rising_edge(CLK) then
--- if (RESET = '1') then
--- rec_frames <= (others => '0');
--- elsif (dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
--- rec_frames <= rec_frames + x"1";
--- end if;
--- end if;
---end process REC_FRAMES_PROC;
---
--- needed for identification
-SENT_FRAMES_PROC : process(CLK)
+SENT_FRAMES_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') then
- sent_frames <= (others => '0');
- elsif (dissect_current_state = CLEANUP) then
- sent_frames <= sent_frames + x"1";
- end if;
- end if;
+ if ( RESET = '1' ) then
+ sent_frames <= (others => '0');
+ elsif( rising_edge(CLK) ) then
+ if( dissect_current_state = CLEANUP ) then
+ sent_frames <= sent_frames + x"1";
+ end if;
+ end if;
end process SENT_FRAMES_PROC;
---
---RECEIVED_FRAMES_OUT <= rec_frames;
---SENT_FRAMES_OUT <= sent_frames;
---RECEIVED_FRAMES_OUT <= rec_frames;
---SENT_FRAMES_OUT <= sent_frames;
---
---STATS_MACHINE_PROC : process(CLK)
---begin
--- if rising_edge(CLK) then
--- if (RESET = '1') then
--- stats_current_state <= IDLE;
--- else
--- stats_current_state <= stats_next_state;
--- end if;
--- end if;
---end process STATS_MACHINE_PROC;
---
---STATS_MACHINE : process(stats_current_state, PS_WR_EN_IN, PS_ACTIVATE_IN, STAT_DATA_ACK_IN, PS_DATA_IN, dissect_current_state)
---begin
---
--- case (stats_current_state) is
---
--- when IDLE =>
--- if (dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') or (dissect_current_state = CLEANUP) then
--- stats_next_state <= LOAD_SENT;
--- else
--- stats_next_state <= IDLE;
--- end if;
---
--- when LOAD_SENT =>
--- if (STAT_DATA_ACK_IN = '1') then
--- stats_next_state <= LOAD_RECEIVED;
--- else
--- stats_next_state <= LOAD_SENT;
--- end if;
---
--- when LOAD_RECEIVED =>
--- if (STAT_DATA_ACK_IN = '1') then
--- stats_next_state <= CLEANUP;
--- else
--- stats_next_state <= LOAD_RECEIVED;
--- end if;
---
--- when CLEANUP =>
--- stats_next_state <= IDLE;
---
--- end case;
---
---end process STATS_MACHINE;
---
---SELECTOR : process(CLK)
---begin
--- if rising_edge(CLK) then
--- case(stats_current_state) is
---
--- when LOAD_SENT =>
--- stat_data_temp <= x"0401" & sent_frames;
--- STAT_ADDR_OUT <= std_logic_vector(to_unsigned(STAT_ADDRESS_BASE, 8));
---
--- when LOAD_RECEIVED =>
--- stat_data_temp <= x"0402" & rec_frames;
--- STAT_ADDR_OUT <= std_logic_vector(to_unsigned(STAT_ADDRESS_BASE + 1, 8));
---
--- when others =>
--- stat_data_temp <= (others => '0');
--- STAT_ADDR_OUT <= (others => '0');
---
--- end case;
--- end if;
---end process SELECTOR;
---
---STAT_DATA_OUT(7 downto 0) <= stat_data_temp(31 downto 24);
---STAT_DATA_OUT(15 downto 8) <= stat_data_temp(23 downto 16);
---STAT_DATA_OUT(23 downto 16) <= stat_data_temp(15 downto 8);
---STAT_DATA_OUT(31 downto 24) <= stat_data_temp(7 downto 0);
---
---STAT_SYNC : process(CLK)
---begin
--- if rising_edge(CLK) then
--- if (stats_current_state /= IDLE and stats_current_state /= CLEANUP) then
--- STAT_DATA_RDY_OUT <= '1';
--- else
--- STAT_DATA_RDY_OUT <= '0';
--- end if;
--- end if;
---end process STAT_SYNC;
---STAT_DATA_RDY_OUT <= '1' when stats_current_state /= IDLE and stats_current_state /= CLEANUP else '0';
-
--- **** debug
---DEBUG_OUT(3 downto 0) <= state;
---DEBUG_OUT(4) <= '0';
---DEBUG_OUT(7 downto 5) <= "000";
---DEBUG_OUT(8) <= '0';
---DEBUG_OUT(11 downto 9) <= "000";
---DEBUG_OUT(31 downto 12) <= (others => '0');
--- ****
end trb_net16_gbe_response_constructor_Ping;
use work.trb_net16_hub_func.all;
use work.trb_net_gbe_components.all;
-use work.trb_net_gbe_protocols.all;
+use work.gbe_protocols.all;
entity trb_net16_gbe_response_constructor_SCTRL is
-generic ( STAT_ADDRESS_BASE : integer := 0;
- SLOWCTRL_BUFFER_SIZE : integer range 1 to 4 := 1
-);
- port (
+ generic(
+ SLOWCTRL_BUFFER_SIZE : integer range 1 to 4 := 1
+ );
+ port(
CLK : in std_logic; -- system clock
RESET : in std_logic;
-
-- INTERFACE
MY_MAC_IN : in std_logic_vector(47 downto 0);
MY_IP_IN : in std_logic_vector(31 downto 0);
PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
+--
TC_RD_EN_IN : in std_logic;
TC_DATA_OUT : out std_logic_vector(8 downto 0);
TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
-
+--
DEBUG_OUT : out std_logic_vector(63 downto 0);
-- END OF INTERFACE
-
-- protocol specific ports
GSC_CLK_IN : in std_logic;
GSC_INIT_DATAREADY_OUT : out std_logic;
MAKE_RESET_OUT : out std_logic;
CFG_MAX_REPLY_SIZE_IN : in std_logic_vector(31 downto 0);
-- end of protocol specific ports
-
MONITOR_SELECT_REC_OUT : out std_logic_vector(31 downto 0);
MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(31 downto 0);
MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(31 downto 0);
MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0);
-
DATA_HIST_OUT : out hist_array
);
end entity trb_net16_gbe_response_constructor_SCTRL;
signal saved_target_ip : std_logic_vector(31 downto 0);
signal data_ctr : integer range 0 to 30;
-signal stat_data_temp : std_logic_vector(31 downto 0);
signal rec_frames : std_logic_vector(15 downto 0);
signal rx_fifo_q : std_logic_vector(17 downto 0);
signal reset_detected : std_logic := '0';
signal make_reset : std_logic := '0';
-
signal fifo_rd_q : std_logic;
signal too_much_data : std_logic;
MAKE_RESET_OUT <= make_reset;
-receive_fifo : entity work.fifo_2kx9x18_wcnt
+receive_fifo: entity work.fifo_2kx9x18_wcnt
PORT map(
Reset => RESET,
RPReset => RESET,
(dissect_current_state = READ_FRAME and PS_DATA_IN(8) = '1')
else '0'; -- preload first word
-RX_FIFO_WR_SYNC : process(CLK)
+RX_FIFO_WR_SYNC: process( CLK )
begin
- if rising_edge(CLK) then
+ if( rising_edge(CLK) ) then
- if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and (saved_hdr_ctr = "0100" or saved_hdr_ctr = "1000")) then
+ if( PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and (saved_hdr_ctr = "0100" or saved_hdr_ctr = "1000") ) then
rx_fifo_wr <= '1';
else
rx_fifo_wr <= '0';
end if;
end process RX_FIFO_WR_SYNC;
-SAVED_HDR_CTR_PROC : process(CLK)
+SAVED_HDR_CTR_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (dissect_current_state = IDLE and PS_WR_EN_IN = '0' and PS_ACTIVATE_IN = '0') then
+ if( rising_edge(CLK) ) then
+ if ( dissect_current_state = IDLE and PS_WR_EN_IN = '0' and PS_ACTIVATE_IN = '0' ) then
saved_hdr_ctr <= "0001";
- elsif (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and saved_hdr_ctr /= "1000") then
+ elsif( PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and saved_hdr_ctr /= "1000" ) then
saved_hdr_ctr(3 downto 0) <= saved_hdr_ctr(2 downto 0) & '0';
- else
- saved_hdr_ctr <= saved_hdr_ctr;
end if;
end if;
end process SAVED_HDR_CTR_PROC;
-SAVED_HDR_PROC : process(CLK)
+SAVED_HDR_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
- if (saved_hdr_ctr = "0001") then
+ if( rising_edge(CLK) ) then
+ if( PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
+ if( saved_hdr_ctr = "0001" ) then
saved_hdr_1 <= PS_DATA_IN(7 downto 0);
saved_hdr_2 <= saved_hdr_2;
- elsif (saved_hdr_ctr = "0010") then
+ elsif( saved_hdr_ctr = "0010" ) then
saved_hdr_2 <= PS_DATA_IN(7 downto 0);
saved_hdr_1 <= saved_hdr_1;
- else
- saved_hdr_1 <= saved_hdr_1;
- saved_hdr_2 <= saved_hdr_2;
end if;
- else
- saved_hdr_1 <= saved_hdr_1;
- saved_hdr_2 <= saved_hdr_2;
end if;
end if;
end process SAVED_HDR_PROC;
-
----TODO: add a register
GSC_INIT_DATA_OUT(7 downto 0) <= rx_fifo_q(16 downto 9);
GSC_INIT_DATA_OUT(15 downto 8) <= rx_fifo_q(7 downto 0);
(dissect_current_state = WAIT_FOR_HUB)
else '0';
-PACKET_NUM_PROC : process(CLK)
+PACKET_NUM_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (dissect_current_state = IDLE) then
+ if( rising_edge(CLK) ) then
+ if( dissect_current_state = IDLE ) then
packet_num <= "100";
- elsif (GSC_INIT_READ_IN = '1' and rx_fifo_rd = '1' and packet_num = "100" and dissect_current_state /= READ_FRAME) then --BUG zählt schon hoch beim fifo_rd weil read schon 1 ist. read geht aber nur auf 1 wenn dataready auf 1 ist
+ elsif( GSC_INIT_READ_IN = '1' and rx_fifo_rd = '1' and packet_num = "100" and dissect_current_state /= READ_FRAME ) then --BUG zählt schon hoch beim fifo_rd weil read schon 1 ist. read geht aber nur auf 1 wenn dataready auf 1 ist
packet_num <= "000";
- elsif (rx_fifo_rd = '1' and packet_num /= "100") then
+ elsif( rx_fifo_rd = '1' and packet_num /= "100" ) then
packet_num <= packet_num + "1";
end if;
end if;
end process PACKET_NUM_PROC;
-tf_4k_gen : if SLOWCTRL_BUFFER_SIZE = 1 generate
- transmit_fifo : entity work.fifo_4kx18x9_wcnt
- PORT map(
+tf_4k_gen: if SLOWCTRL_BUFFER_SIZE = 1 generate
+ transmit_fifo: entity work.fifo_4kx18x9_wcnt
+ port map(
Reset => tx_fifo_reset,
RPReset => tx_fifo_reset,
WrClock => CLK,
);
end generate tf_4k_gen;
-tf_65k_gen : if SLOWCTRL_BUFFER_SIZE = 2 generate
- transmit_fifo : entity work.fifo_64kx18x9_wcnt
- PORT map(
+tf_65k_gen: if SLOWCTRL_BUFFER_SIZE = 2 generate
+ transmit_fifo: entity work.fifo_64kx18x9_wcnt
+ port map(
Reset => tx_fifo_reset,
RPReset => tx_fifo_reset,
WrClock => CLK,
);
end generate tf_65k_gen;
-TX_FIFO_WR_SYNC : process(CLK)
+TX_FIFO_WR_SYNC: process( CLK )
begin
- if rising_edge(CLK) then
- if (GSC_REPLY_DATAREADY_IN = '1' and gsc_reply_read = '1') then
+ if( rising_edge(CLK) ) then
+ if( GSC_REPLY_DATAREADY_IN = '1' and gsc_reply_read = '1' ) then
tx_fifo_wr <= '1';
- elsif (saved_hdr_ctr = "0010") then
+ elsif( saved_hdr_ctr = "0010" ) then
tx_fifo_wr <= '1';
else
tx_fifo_wr <= '0';
end if;
- if (saved_hdr_ctr = "010") then
+ if( saved_hdr_ctr = "010" ) then
tx_fifo_data <= '0' & PS_DATA_IN(7 downto 0) & '0' & x"02";
else
tx_fifo_data(7 downto 0) <= GSC_REPLY_DATA_IN(15 downto 8);
tx_fifo_rd <= '1' when TC_RD_EN_IN = '1' and PS_SELECTED_IN = '1' else '0';
-TX_FIFO_SYNC_PROC : process(CLK)
+TX_FIFO_SYNC_PROC: process( CLK, RESET )
begin
- if rising_edge(CLK) then
- if (RESET = '1') or (too_much_data = '1' and dissect_current_state = CLEANUP) then
+ if ( RESET = '1' ) then
+ tx_fifo_reset <= '1';
+ elsif( rising_edge(CLK) ) then
+ if( too_much_data = '1' and dissect_current_state = CLEANUP ) then
tx_fifo_reset <= '1';
else
tx_fifo_reset <= '0';
end if;
end process TX_FIFO_SYNC_PROC;
-TC_DATA_PROC : process(CLK)
+TC_DATA_PROC: process( CLK )
begin
- if rising_edge(CLK) then
+ if( rising_edge(CLK) ) then
TC_DATA_OUT(7 downto 0) <= tx_fifo_q(7 downto 0);
- if (tx_loaded_ctr = tx_data_ctr) then
+ if( tx_loaded_ctr = tx_data_ctr ) then
TC_DATA_OUT(8) <= '1';
else
TC_DATA_OUT(8) <= '0';
end if;
end process TC_DATA_PROC;
-GSC_REPLY_READ_PROC : process(CLK)
+GSC_REPLY_READ_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (dissect_current_state = WAIT_FOR_RESPONSE or dissect_current_state = SAVE_RESPONSE) then
+ if( rising_edge(CLK) ) then
+ if( dissect_current_state = WAIT_FOR_RESPONSE or dissect_current_state = SAVE_RESPONSE ) then
gsc_reply_read <= '1';
else
gsc_reply_read <= '0';
GSC_REPLY_READ_OUT <= gsc_reply_read;
-- counter of data received from TRBNet hub
-TX_DATA_CTR_PROC : process(CLK)
+TX_DATA_CTR_PROC: process( CLK )
begin
- if rising_edge(CLK) then
+ if( rising_edge(CLK) ) then
if (dissect_current_state = IDLE) then
tx_data_ctr <= (others => '0');
- elsif (tx_fifo_wr = '1') then
+ elsif( tx_fifo_wr = '1' ) then
tx_data_ctr <= tx_data_ctr + x"2";
end if;
end if;
end process TX_DATA_CTR_PROC;
-TOO_MUCH_DATA_PROC : process(CLK)
+TOO_MUCH_DATA_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (dissect_current_state = IDLE) then
+ if( rising_edge(CLK) ) then
+ if ( dissect_current_state = IDLE ) then
too_much_data <= '0';
- elsif (dissect_current_state = SAVE_RESPONSE) and (tx_data_ctr = CFG_MAX_REPLY_SIZE_IN(15 downto 0)) then
+ elsif( (dissect_current_state = SAVE_RESPONSE) and (tx_data_ctr = CFG_MAX_REPLY_SIZE_IN(15 downto 0)) ) then
too_much_data <= '1';
- else
- too_much_data <= too_much_data;
end if;
end if;
end process TOO_MUCH_DATA_PROC;
-- total counter of data transported to frame constructor
-TX_LOADED_CTR_PROC : process(CLK)
+TX_LOADED_CTR_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (dissect_current_state = IDLE) then
+ if( rising_edge(CLK) ) then
+ if( dissect_current_state = IDLE ) then
tx_loaded_ctr <= x"0000";
- elsif (dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1') then
+ elsif( dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' ) then
tx_loaded_ctr <= tx_loaded_ctr + x"1";
- else
- tx_loaded_ctr <= tx_loaded_ctr;
end if;
end if;
end process TX_LOADED_CTR_PROC;
-PS_RESPONSE_SYNC : process(CLK)
+PS_RESPONSE_SYNC: process( CLK )
begin
- if rising_edge(CLK) then
- if (too_much_data = '0') then
- if (dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP) then
+ if( rising_edge(CLK) ) then
+ if( too_much_data = '0' ) then
+ if( dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP ) then
PS_RESPONSE_READY_OUT <= '1';
else
PS_RESPONSE_READY_OUT <= '0';
end if;
end if;
- if (dissect_current_state = IDLE or dissect_current_state = WAIT_FOR_RESPONSE) then
+ if( dissect_current_state = IDLE or dissect_current_state = WAIT_FOR_RESPONSE ) then
PS_BUSY_OUT <= '0';
else
PS_BUSY_OUT <= '1';
TC_FRAME_SIZE_OUT <= tx_data_ctr;
-DISSECT_MACHINE_PROC : process(RESET, CLK)
+DISSECT_MACHINE_PROC: process( CLK, RESET )
begin
- if RESET = '1' then
+ if ( RESET = '1' ) then
dissect_current_state <= IDLE;
- elsif rising_edge(CLK) then
+ elsif( rising_edge(CLK) ) then
dissect_current_state <= dissect_next_state;
end if;
end process DISSECT_MACHINE_PROC;
-DISSECT_MACHINE : process(dissect_current_state, reset_detected, too_much_data, PS_WR_EN_IN, PS_ACTIVATE_IN, PS_DATA_IN, PS_SELECTED_IN, GSC_INIT_READ_IN, GSC_REPLY_DATAREADY_IN, tx_loaded_ctr, tx_data_ctr, rx_fifo_q, GSC_BUSY_IN)
+DISSECT_MACHINE: process(dissect_current_state, reset_detected, too_much_data, PS_WR_EN_IN, PS_ACTIVATE_IN,
+ PS_DATA_IN, PS_SELECTED_IN, GSC_INIT_READ_IN, GSC_REPLY_DATAREADY_IN, tx_loaded_ctr,
+ tx_data_ctr, rx_fifo_q, GSC_BUSY_IN)
begin
state <= x"0";
end process DISSECT_MACHINE;
-- reset request packet detection
-RESET_DETECTED_PROC : process(CLK)
+RESET_DETECTED_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (dissect_current_state = IDLE) then
+ if( rising_edge(CLK) ) then
+ if ( dissect_current_state = IDLE ) then
reset_detected <= '0';
- elsif (PS_DATA_IN(7 downto 0) = x"80" and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and saved_hdr_ctr = "0100") then
+ elsif( PS_DATA_IN(7 downto 0) = x"80" and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and saved_hdr_ctr = "0100" ) then
reset_detected <= '1';
- else
- reset_detected <= reset_detected;
end if;
end if;
end process RESET_DETECTED_PROC;
-MAKE_RESET_PROC : process(CLK)
+MAKE_RESET_PROC: process( CLK )
begin
- if rising_edge(CLK) then
- if (dissect_current_state = IDLE) then
+ if( rising_edge(CLK) ) then
+ if ( dissect_current_state = IDLE ) then
make_reset <= '0';
- elsif (dissect_current_state = CLEANUP and reset_detected = '1') then
+ elsif( dissect_current_state = CLEANUP and reset_detected = '1' ) then
make_reset <= '1';
- else
- make_reset <= make_reset;
end if;
end if;
end process MAKE_RESET_PROC;
hist_ctrs_gen : for i in 0 to 31 generate
- process(CLK)
+ process( CLK )
begin
if rising_edge(CLK) then
if (RESET = '1') then
MAC_CONF_START_OUT => mac_conf_start(i),
MAC_CONF_STOP_OUT => mac_conf_stop(i),
LINK_ACTIVE_OUT => link_active(i),
+ LINK_START_OUT => open,
+ LINK_STOP_OUT => open,
DEBUG => open
);
jspc29 / trbnet.git / commitdiff