*** empty log message ***

diff --git a/trb3/Trb3GeneralRemarks.tex b/trb3/Trb3GeneralRemarks.tex
index 4b9e855db9e2f9dffdd44b2f21e39a645e5dc320..4f12a7da1a0dbda2956cc6263fbbdddfdce1d6ef 100644 (file)
--- a/trb3/Trb3GeneralRemarks.tex
+++ b/trb3/Trb3GeneralRemarks.tex
@@ -35,19 +35,47 @@ First, the name of the design has to contain a certain sub-string:
  \item[trb3\_periph or trb3\_fpga1234] if the design is targeted to either of the peripheral FPGA
  \item[trb3\_fpgaN] were N is a number between 1 and 4 if the design should be loaded to a special FPGA only
 \end{description}
-
-Second, the TrbNet endpoint has a generic setting \signal{Regio\_Hardware\_Version} that has to be according to the following rules: The lower 16 Bit can be freely assigned, i.e. to mark different software revisions. The upper 16 Bit have to contain one of the following values:
-\begin{itemize*}
- \item 0x9000 if the design is for the central FPGA
- \item 0x9100 if the design is for either of the peripheral FPGAs
- \item 0x9110 if the design is for FPGA 1 only
- \item 0x9120 if the design is for FPGA 2 only
- \item 0x9130 if the design is for FPGA 3 only
- \item 0x9140 if the design is for FPGA 4 only
-\end{itemize*}
-
-These values are used by the software to identify the hardware before programming the Flash to prevent loading invalid designs.
-
+Second, the upper 16 Bit of the Hardware Version register as described below is checked.
+
+
+\subsubsection{Design Identification}
+The TrbNet endpoint has a generic setting \signal{Regio\_Hardware\_Version} (register 0x42) that has to be set according to the following rules:  The upper 16 Bit are used by the software to identify the hardware before programming the Flash to prevent loading invalid designs and have to contain one of the following values:
+\begin{description*}
+ \item[9000] design is for the central FPGA
+ \item[9100] design is for either of the peripheral FPGAs
+ \item[9110] design is for FPGA 1 only
+ \item[9120] design is for FPGA 2 only
+ \item[9130] design is for FPGA 3 only
+ \item[9140] design is for FPGA 4 only
+\end{description*}
+
+The lower 16 Bit are used to identify the contents of the design and the AddOn boards they should be used with. Combine as many values as you like by logical or.
+\begin{description*}
+\item[Central FPGA]~
+\begin{description*}
+  \item[c000]  contains a CTS
+  \item[c001]  contains a CTS, use with AddOn for trigger signals
+  \item[0e00]  contains a GbE link for slow control and read-out
+  \item[0d00]  contains a GbE link for read-out only
+  \item[0010]  accepts triggers from optical link SFP1
+  \item[0020]  accepts slow-control from optical link SFP1
+  \item[0040]  sends triggers to optical link SFP1
+  \item[0080]  sends slow-control to optical link SFP1
+\end{description*}
+\item[Peripheral FPGA]~
+\begin{description*}
+  \item[0XXX]  use with ADA adapter board AddOn version 1
+  \item[1XXX]  use with ADA adapter board AddOn version 2
+  \item[2XXX]  use with multipurpose test AddOn
+  \item[3XXX]  use with SFP hub AddOn
+  \item[4XXX]  use with Wasa adapter AddOn
+  \item[X0nX]  contains $2^n$ TDC channels, single edge
+  \item[X1nX]  contains $2^n$ TDC channels, double edge
+  \item[X2XX]  contains a network hub
+\end{description*}
+\end{description*}
+
+Software versions can be stored in the generic \signal{Regio\_Compile\_Version} (register 0x41).
 
 \subsubsection{Network Addresses}
 All boards of a given type are accessible by a broadcast address at the same time. This is set by \signal{Broadcast\_Special\_Addr} in the TrbNet endpoint:
@@ -72,8 +100,9 @@ The initial address set with \signal{Regio\_Init\_Address} can be chosen from th
 
 
 \subsection{Testing Procedure for New Boards}
-\begin{itemize}
+\begin{itemize*}
  \item Visual Inspection
+ \item Add sticker with serial number
  \item Power-up - current should be around 0.25A at 48V
  \item Check if fixes (Flash 0R) are done
  \item Load set of configuration files (no Flash programming for FPGAs, only load design)
@@ -82,7 +111,7 @@ The initial address set with \signal{Regio\_Init\_Address} can be chosen from th
  \item Reboot Board to see if all FPGA boot from Flash
  \item Add the five unique IDs to the \filename{serials\_trb3.db} in the cvs (see \ref{Trb3BoardID})
  \item Add board as tested to wiki page
-\end{itemize}
+\end{itemize*}
 
 
 

diff --git a/trb3/main.tex b/trb3/main.tex
index be5ec373fe7f173e675a5cbafdf22aea82d4fe6d..3d81ccfe245b14babe174cfbc98da5603cc1d968 100755 (executable)
--- a/trb3/main.tex
+++ b/trb3/main.tex
@@ -63,6 +63,13 @@
     \setlength{\partopsep}{1pt}}%
   {\end{itemize}}
 
+\newenvironment{description*}%
+  {\begin{description}%
+    \setlength{\itemsep}{0pt}%
+    \setlength{\parskip}{0pt}%
+    \setlength{\topsep}{1pt}%
+    \setlength{\partopsep}{1pt}}%
+  {\end{description}}
 
 \title{A Users Guide\\to the TRB3 \\and FPGA-TDC Based Platforms}
 \date{\today ~-~\thistime}

diff --git a/trb3/trb3.kilepr b/trb3/trb3.kilepr
index 3d23edeb973e88d64728d7f335425fa1a48959a6..447e72097f0c75ab22721b08596583b26aa456ef 100644 (file)
--- a/trb3/trb3.kilepr
+++ b/trb3/trb3.kilepr
@@ -3,8 +3,8 @@ def_graphic_ext=eps
 img_extIsRegExp=false
 img_extensions=.eps .jpg .jpeg .png .pdf .ps .fig .gif
 kileprversion=2
-kileversion=2.1.0
-lastDocument=main.tex
+kileversion=2.1.2
+lastDocument=TdcSlowControl.tex
 masterDocument=
 name=trb3
 pkg_extIsRegExp=false
@@ -19,6 +19,8 @@ QuickBuild=
 [document-settings,item:CodeRepository.tex]
 Bookmarks=
 Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
 Highlighting=LaTeX
 Indentation Mode=
 Mode=LaTeX
@@ -27,6 +29,18 @@ ReadWrite=true
 [document-settings,item:DacProgramming.tex]
 Bookmarks=
 Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
+Highlighting=LaTeX
+Indentation Mode=
+Mode=LaTeX
+ReadWrite=true
+
+[document-settings,item:GbEGettingStarted.tex]
+Bookmarks=
+Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
 Highlighting=LaTeX
 Indentation Mode=
 Mode=LaTeX
@@ -35,6 +49,8 @@ ReadWrite=true
 [document-settings,item:MultiTestAddOn.tex]
 Bookmarks=
 Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
 Highlighting=LaTeX
 Indentation Mode=
 Mode=LaTeX
@@ -43,6 +59,8 @@ ReadWrite=true
 [document-settings,item:MvdAddOn.tex]
 Bookmarks=
 Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
 Highlighting=LaTeX
 Indentation Mode=
 Mode=LaTeX
@@ -51,6 +69,8 @@ ReadWrite=true
 [document-settings,item:SfpAddOn.tex]
 Bookmarks=
 Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
 Highlighting=LaTeX
 Indentation Mode=
 Mode=LaTeX
@@ -59,6 +79,18 @@ ReadWrite=true
 [document-settings,item:TdcAddOn.tex]
 Bookmarks=
 Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
+Highlighting=LaTeX
+Indentation Mode=
+Mode=LaTeX
+ReadWrite=true
+
+[document-settings,item:TdcSlowControl.tex]
+Bookmarks=
+Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
 Highlighting=LaTeX
 Indentation Mode=
 Mode=LaTeX
@@ -67,6 +99,8 @@ ReadWrite=true
 [document-settings,item:Trb3ClockTriggerDistribution.tex]
 Bookmarks=
 Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
 Highlighting=LaTeX
 Indentation Mode=
 Mode=LaTeX
@@ -75,6 +109,8 @@ ReadWrite=true
 [document-settings,item:Trb3GeneralRemarks.tex]
 Bookmarks=
 Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
 Highlighting=LaTeX
 Indentation Mode=
 Mode=LaTeX
@@ -83,6 +119,8 @@ ReadWrite=true
 [document-settings,item:Trb3KnownBugs.tex]
 Bookmarks=
 Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
 Highlighting=LaTeX
 Indentation Mode=
 Mode=LaTeX
@@ -91,6 +129,8 @@ ReadWrite=true
 [document-settings,item:main.tex]
 Bookmarks=
 Encoding=UTF-8
+FoldedColumns=
+FoldedLines=
 Highlighting=LaTeX
 Indentation Mode=
 Mode=LaTeX
@@ -104,7 +144,7 @@ highlight=LaTeX
 line=0
 mode=LaTeX
 open=true
-order=7
+order=9
 
 [item:DacProgramming.tex]
 archive=true
@@ -114,7 +154,17 @@ highlight=LaTeX
 line=19
 mode=LaTeX
 open=true
-order=9
+order=11
+
+[item:GbEGettingStarted.tex]
+archive=true
+column=0
+encoding=UTF-8
+highlight=LaTeX
+line=0
+mode=LaTeX
+open=true
+order=1
 
 [item:MultiTestAddOn.tex]
 archive=true
@@ -124,7 +174,7 @@ highlight=LaTeX
 line=1
 mode=LaTeX
 open=true
-order=4
+order=6
 
 [item:MvdAddOn.tex]
 archive=true
@@ -134,7 +184,7 @@ highlight=LaTeX
 line=0
 mode=LaTeX
 open=true
-order=6
+order=8
 
 [item:SfpAddOn.tex]
 archive=true
@@ -144,7 +194,7 @@ highlight=LaTeX
 line=2
 mode=LaTeX
 open=true
-order=5
+order=7
 
 [item:TdcAddOn.tex]
 archive=true
@@ -154,7 +204,17 @@ highlight=LaTeX
 line=1
 mode=LaTeX
 open=true
-order=3
+order=5
+
+[item:TdcSlowControl.tex]
+archive=true
+column=97
+encoding=UTF-8
+highlight=LaTeX
+line=37
+mode=LaTeX
+open=true
+order=2
 
 [item:Trb3ClockTriggerDistribution.tex]
 archive=true
@@ -164,7 +224,7 @@ highlight=LaTeX
 line=7
 mode=LaTeX
 open=true
-order=2
+order=4
 
 [item:Trb3GeneralRemarks.tex]
 archive=true
@@ -174,7 +234,7 @@ highlight=LaTeX
 line=30
 mode=LaTeX
 open=true
-order=8
+order=10
 
 [item:Trb3KnownBugs.tex]
 archive=true
@@ -184,7 +244,7 @@ highlight=LaTeX
 line=13
 mode=LaTeX
 open=true
-order=1
+order=3
 
 [item:main.tex]
 archive=true
@@ -209,39 +269,71 @@ order=-1
 [view-settings,view=0,item:CodeRepository.tex]
 CursorColumn=0
 CursorLine=0
+JumpList=
+ViMarks=
 
 [view-settings,view=0,item:DacProgramming.tex]
 CursorColumn=43
 CursorLine=19
+JumpList=
+ViMarks=
+
+[view-settings,view=0,item:GbEGettingStarted.tex]
+CursorColumn=0
+CursorLine=0
+JumpList=
+ViMarks=
 
 [view-settings,view=0,item:MultiTestAddOn.tex]
 CursorColumn=0
 CursorLine=1
+JumpList=
+ViMarks=
 
 [view-settings,view=0,item:MvdAddOn.tex]
 CursorColumn=0
 CursorLine=0
+JumpList=
+ViMarks=
 
 [view-settings,view=0,item:SfpAddOn.tex]
 CursorColumn=0
 CursorLine=2
+JumpList=
+ViMarks=
 
 [view-settings,view=0,item:TdcAddOn.tex]
 CursorColumn=0
 CursorLine=1
+JumpList=
+ViMarks=
+
+[view-settings,view=0,item:TdcSlowControl.tex]
+CursorColumn=97
+CursorLine=37
+JumpList=
+ViMarks=
 
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+JumpList=
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+JumpList=
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