Fix for Modelsim

diff --git a/ADC/source/adc_ad9219.vhd b/ADC/source/adc_ad9219.vhd
index 62cd932e17d533a8c5f05c93bf9e8c74d8686d6e..b8c9afe4956a452ec18d4ea19fff53fa50cc71b6 100644 (file)
--- a/ADC/source/adc_ad9219.vhd
+++ b/ADC/source/adc_ad9219.vhd
@@ -179,12 +179,13 @@ begin
     clk_fifo   <= clk_adc;
     fifo_empty <= (others => '0'); -- since we're reading with sampling frequency
     fill_fifo : process is
-      variable count : integer range 0 to 7 := 0;
+      constant count_max : integer := 7;
+      variable count : integer range 0 to count_max := 0;
     begin
       wait until rising_edge(clk_fifo);
       if RESTART_IN = '1' then
         count := 0;
-      elsif count /= count'high then
+      elsif count /= count_max then
         count := count + 1;
         fifo_read <= (others => '0');
       else