]> jspc29.x-matter.uni-frankfurt.de Git - trb3.git/commitdiff
Lets try without the state debug stuff
authorAndreas Neiser <neiser@kph.uni-mainz.de>
Mon, 2 Mar 2015 12:29:02 +0000 (13:29 +0100)
committerAndreas Neiser <neiser@kph.uni-mainz.de>
Sat, 13 Jun 2015 15:37:01 +0000 (17:37 +0200)
ADC/source/adc_ad9219.vhd
ADC/source/adc_processor_cfd.vhd

index bc251c56e7edd20acff45dcec50f671ba1e6c38c..ae9e2c76bc2faf18e3a1cbb8104bfdb04beed18a 100644 (file)
@@ -324,7 +324,7 @@ begin
     proc_debug : process
     begin
       wait until rising_edge(clk_rd);
-      state_qq(i)                           <= state_q(i);
+      --state_qq(i)                           <= state_q(i);
       counter_q(i)                         <= counter(i);
       DEBUG(i * 32 + 31 downto i * 32 + 4) <= std_logic_vector(counter_q(i));
       case state_qq(i) is
index ffa7c23474a90acec85ca024c252d12f599259e7..45039ea9e037c3bd026e6f22812d59816e5e0e4a 100644 (file)
@@ -228,7 +228,7 @@ begin
   end process;
 
   statebits             <= std_logic_vector(to_unsigned(state_t'pos(state), 8)) when rising_edge(CLK_SYS);
-  statebits_adc <= statebits when rising_edge(CLK_ADC);
+  --statebits_adc <= statebits when rising_edge(CLK_ADC);
   
   PROC_DEBUG_BUFFER : process
     variable c : integer range 0 to 3;