small changes - also for simulation

diff --git a/xilinx/shift_lut_x16.vhd b/xilinx/shift_lut_x16.vhd
index 43ae8fef14941c63ecc3326d5f0c034c6c4011c1..5d5349ba829ef2c5c0b332f5cf83fdc804f56a4a 100644 (file)
--- a/xilinx/shift_lut_x16.vhd
+++ b/xilinx/shift_lut_x16.vhd
@@ -36,7 +36,7 @@ component SRLC16E
         Q15  : out std_logic
        ); 
 end component;
-attribute BOX_TYPE of SRLC16E : component is "BLACK_BOX";
+--attribute BOX_TYPE of SRLC16E : component is "BLACK_BOX";
 --
 -- signal declarations
 signal SHIFT_CHAIN : std_logic_vector ((2**ADDRESS_WIDTH) downto 0);