extern uint16_t spi1DataBuffer[];
extern uint16_t SPI_DMA_Buffer_In[];
+extern uint16_t SPI_DMA_Buffer[];
uint16_t uC_regs[UC_NO_REGS];
uint16_t debug_counter = 0;
void adc0_read(void){
uint8_t c = 0; // counter for spi buffer fill
+ static uint8_t d = 0;
+
+ c = 0;
// the received data is always one transfer cycle
// later than the corresponding commands requesting
spi1_writeWord(CH4VSGND | UNIPOLAR); // VDDACUR
SPI_DMA_Buffer_In[c++] = VDDDCUR;
SPI_DMA_Buffer_In[c++] = spi1_receivedWord();
- spi1_writeWord(CH5VSCH7 | UNIPOLAR); // VDDD
+// spi1_writeWord(CH5VSCH7 | UNIPOLAR); // VDDD
+ spi1_writeWord(CH5VSGND | UNIPOLAR); // VDDD vs AGND
SPI_DMA_Buffer_In[c++] = VDDACUR;
SPI_DMA_Buffer_In[c++] = spi1_receivedWord();
- spi1_writeWord(CH6VSCH7 | UNIPOLAR); // VDDA
+// spi1_writeWord(CH6VSCH7 | UNIPOLAR); // VDDA
+ spi1_writeWord(CH6VSGND | UNIPOLAR); // VDDA vs AGND
SPI_DMA_Buffer_In[c++] = VDDD;
SPI_DMA_Buffer_In[c++] = spi1_receivedWord();
spi1_writeWord(CH7VSGND | UNIPOLAR); // GNDSENSE
SPI_DMA_Buffer_In[c++] = VDISCREF2D;
SPI_DMA_Buffer_In[c++] = spi1_receivedWord();
- spi1_writeWord(CH1VSGND | UNIPOLAR); // dummy command
+ spi1_writeWord(CH3VSGND | UNIPOLAR); // dummy command
SPI_DMA_Buffer_In[c++] = VDISCREFD;
SPI_DMA_Buffer_In[c++] = spi1_receivedWord();
+
+
+// SPI_DMA_Buffer[c++] = d;
+// SPI_DMA_Buffer[c++] = d;
+//
+ d = (d+1)%16;
+//
debug_out(c);
spi_dma_transfer(c);
#define CH2VSGND 0b1001000000000000
#define CH3VSGND 0b1101000000000000
#define CH4VSGND 0b1010000000000000
+#define CH5VSGND 0b1110000000000000
+#define CH6VSGND 0b1011000000000000
#define CH7VSGND 0b1111000000000000
#define CH0VSCH7 0b1000100000000000
\r
while(spi_dma_busyFlag){};\r
\r
- memcpy(SPI_DMA_Buffer, SPI_DMA_Buffer_In, count );\r
+ memcpy(SPI_DMA_Buffer, SPI_DMA_Buffer_In, count*2 );\r
\r
// DMA_Cmd(DMA1_Channel4, DISABLE);\r
DMA_Cmd(DMA1_Channel5, DISABLE);\r