*** empty log message ***

diff --git a/rich.tex b/rich.tex
index 7d1e2faf6af378457af4b1f5e2529e98f890ef39..15d11431d4c31b9ada6e636fc6308314f9c5cccd 100755 (executable)
--- a/rich.tex
+++ b/rich.tex
@@ -85,6 +85,9 @@ trigger a different preprocessing option can be used.}
 At the moment, there are two different debug and status words defined in RICH.
 This may change in the future.
 
+In general status word STAT0 is only inserted when an APV is switched, but failed or 
+lost synchronisation. STAT1 is inserted for each APV when debug is enabled.
+
 \begin{table}
 \begin{center}
 \begin{tabularx}{\textwidth}{|c|C|C|}
@@ -207,9 +210,12 @@ The powerup values should allow stable operation.
 \hline
 \hline
 31 -- 24 & SPI command    & SPI command    \\
+\hline
 23 -- 9  & ---            & ---            \\
 8        & ---            & ADC PLL locked \\
+\hline
 7 -- 4   & input delay    & input delay    \\
+\hline
 3        & start SPI      & ---            \\
 2        & APV reset      & APV reset      \\
 1        & ADC powerdown  & ADC powerdown  \\
@@ -278,8 +284,11 @@ table~\ref{richadclevel}.
 \hline
 \hline
 31 -- 24 & BIT\_HIGH   & 0xA0 & bit One min level  \\
+\hline
 23 -- 16 & BIT\_LOW    & 0x30 & bit Zero max level  \\
+\hline
 15 -- 8  & FLAT\_HIGH  & 0x88 & flatline max level  \\
+\hline
 7 -- 0   & FLAT\_LOW   & 0x78 & flatline min level  \\
 \hline
 \end{tabularx}
@@ -324,13 +333,20 @@ corruption.\\
 \hline
 \hline
 31 -- 28 & TRG\_3\_NUM & 0x1 & number of APV frames  \\
+\hline
 27 -- 24 & TRG\_3\_DEL & 0x0 & delay between APV triggers  \\
+\hline
 23 -- 20 & TRG\_2\_NUM & 0x1 & number of APV frames  \\
+\hline
 19 -- 16 & TRG\_2\_DEL & 0x0 & delay between APV triggers  \\
+\hline
 15 -- 12 & TRG\_1\_NUM & 0x1 & number of APV frames  \\
+\hline
 11 -- 8  & TRG\_1\_DEL & 0x0 & delay between APV triggers  \\
+\hline
 7 -- 4   & TRG\_0\_NUM & 0x1 & number of APV frames  \\
-7 -- 0   & TRG\_0\_DEL & 0x0 & delay between APV triggers  \\
+\hline
+3 -- 0   & TRG\_0\_DEL & 0x0 & delay between APV triggers  \\
 \hline
 \end{tabularx}
 \caption{Trigger control register}
@@ -364,18 +380,27 @@ by the internal ADC logic analyzers.
 30       & ---              & APVCLK\_LOCK    & must be 1 for operation \\
 29       & ---              & ADC1\_LOCK      & must be 1 for operation \\
 28       & ---              & ADC0\_LOCK      & must be 1 for operation \\ 
-27       & ---              & CTS\_LOCK       & must be 1 for operation \\
-26 -- 24 & ---              & reserved        & reserved \\
+\hline
+27       & ---              & ADC1\_SWAP      & LCLK phase information \\
+26       & ---              & ADC0\_SWAP      & LCLK phase information \\
+25       & ---              & reserved        & reserved \\
+24       & ---              & CTS\_LOCK       & must be 1 for operation \\
+\hline
 23       & ---              & reserved        & reserved \\
 22 -- 20 & ---              & SECTOR\_ID      & backplane switch setting \\
+\hline
 19       & ---              & reserved        & reserved \\
 18 -- 16 & ---              & MODULE\_ID      & backplane switch setting \\
+\hline
 15 -- 12 & EXT\_IN\_ENABLE  & EXT\_IN\_ENABLE & activate ext. trg. input \\
+\hline
 11 -- 8  & EXT\_IN\_INVERT  & EXT\_IN\_INVERT & invert ext. trg. input \\
+\hline
 7        & 40MHZ\_PLL\_RST  & 40MHZ\_PLL\_RST & reset APV clock PLL \\
 6        & ADC1\_PLL\_RST   & ADC1\_PLL\_RST  & reset ADC1 clock PLL \\
 5        & ADC0\_PLL\_RST   & ADC0\_PLL\_RST  & reset ADC0 clock PLL \\
 4        & CTS\_PLL\_RST    & CTS\_PLL\_RST   & reset CTS clock PLL \\
+\hline
 3 -- 0   & ADC\_APV\_DEL    & ADC\_APV\_DEL   & adjust clock phase \\
 
 \hline

diff --git a/slowcontrol.tex b/slowcontrol.tex
index 6f5eeef16c6fd7d9cf03a7e2fe40a08fc9350096..f9b5a9b627b8b12be97f6b84a75c2aaa40ca6e17 100755 (executable)
--- a/slowcontrol.tex
+++ b/slowcontrol.tex
@@ -221,11 +221,11 @@ Table \ref{regioaddressmap} shows a list of most defined registers within the sl
 42 & information ROM 2 & Hardware Information (set by generic) (r)\\
 50 & global time & Global Time (r/w)\\
 51 & time since trigger & Time since last timing trigger (r)\\
-80 - BF & user status registers & User status registers \\
-C0 - FF & user control registers & User control registers \\
-0100 - 6FFF & reserved & Reserved addresses on internal data port (e.g. for monitoring and other features)\\
-7000 - 7FFF & endpoint monitoring & Monitoring Registers for Endpoint\\
-8000 - FFFF & user defined & User defined address space on the internal data bus \\
+80 -- BF & user status registers & User status registers \\
+C0 -- FF & user control registers & User control registers \\
+0100 -- 6FFF & reserved & Reserved addresses on internal data port (e.g. for monitoring and other features)\\
+7000 -- 7FFF & endpoint monitoring & Monitoring Registers for Endpoint\\
+8000 -- FFFF & user defined & User defined address space on the internal data bus \\
 \hline
 \end{tabularx}
 \caption{Register Map of the Slow Control Endpoint.}
@@ -239,9 +239,9 @@ C0 - FF & user control registers & User control registers \\
 \hline
 \textbf{Address} & \textbf{Name} & \textbf{Description} \\
 \hline\hline
-A000 - CFFF & FEE & Thresholds, Pedestals, Frontend settings \\
-D000 - D13F & Flash & Control for SPI Flashes \\
-E000 - FFFF & Debugging & Memories and Registers for Debugging \\
+A000 -- CFFF & FEE & Thresholds, Pedestals, Frontend settings \\
+D000 -- D13F & Flash & Control for SPI Flashes \\
+E000 -- FFFF & Debugging & Memories and Registers for Debugging \\
 \hline
 \end{tabularx}
 \caption{Register Map of the Slow Control Endpoint. Suggested usage of the user defined registers.}
@@ -276,7 +276,8 @@ The first common control register consists of strobe signals for dummy timing tr
 10 & IPU requested event partially not found / data missing\\
 11 & Severe problem in event data buffer / IPU request handler\\
 12 & Last event sent on IPU is broken\\
-20 - 31 & temperature \\
+13 -- 19 & reserved \\
+20 -- 31 & temperature \\
 \hline
 \end{tabular}
 \caption{Common Status Register 0}