Add trigger bypass to Trigger Handler and flag to ignore pixel (0,0) on thinned Mupix...

diff --git a/mupix/sources/MuPix3_interface.vhd b/mupix/sources/MuPix3_interface.vhd
index 0435cd2311f9f76d385f46322da85489c07e3510..679d78ddbe2ff095b5f2f6af55b24518022cbf40 100644 (file)
--- a/mupix/sources/MuPix3_interface.vhd
+++ b/mupix/sources/MuPix3_interface.vhd
@@ -97,6 +97,8 @@ architecture RTL of mupix_interface is
   signal timestampcontrolbits : std_logic_vector(31 downto 0) := (others => '0');
   signal generatehitswait     : std_logic_vector(31 downto 0) := (others => '0');
 
+  signal ignorehitflag : std_logic := '0';
+
   signal priout_reg : std_logic := '0';
   
 begin
@@ -112,7 +114,8 @@ begin
   --x0026: Pause Register
   --x0027: Delay Counters 2
   --x0028: Divider for graycounter clock
-  --x0029: testoutro
+  --x0029: mask flag for (col,row) = (0,0)
+  --x0030: testoutro
   -----------------------------------------------------------------------------
 
   SLV_HANDLER : process(clk)
@@ -154,6 +157,9 @@ begin
             SLV_DATA_OUT <= graycounter_clkdiv_counter;
             SLV_ACK_OUT <= '1';
           when x"0029" =>
+            SLV_DATA_OUT(0) <= ignorehitflag;
+            SLV_ACK_OUT <= '1';
+          when x"0030" =>
             SLV_DATA_OUT <= testoutro;
             SLV_ACK_OUT <= '1';
           when others =>
@@ -188,6 +194,9 @@ begin
           when x"0028" =>
             graycounter_clkdiv_counter <= SLV_DATA_IN;
             SLV_ACK_OUT <= '1';
+          when x"0029" =>
+            ignorehitflag <= SLV_DATA_IN(0);
+            SLV_ACK_OUT <= '1';
           when others =>
             SLV_UNKNOWN_ADDR_OUT <= '1';
         end case;
@@ -404,7 +413,10 @@ begin
           end if;
           if(std_logic_vector(delcounter) = delaycounters2(31 downto 24)) then
             memdata    <= "111100001111" & hit_col & hit_row & hit_time;  --0xF0F
-            memwren    <= '1';
+            memwren <= '1';
+            if(ignorehitflag = '1' and (hit_col = "000000" and hit_row = "000000")) then
+              memwren    <= '0';
+            end if;
             hitcounter <= hitcounter + 1;
             state      <= readcol;
           elsif(delcounter = "00000000" and hitcounter = "11111111111") then

diff --git a/mupix/sources/TriggerHandler.vhd b/mupix/sources/TriggerHandler.vhd
index 7fd873387be137a22c67ed1583875428a76b05e8..3ca0e7203de65151a6cadfa4f1cb37c9cbfbb97d 100644 (file)
--- a/mupix/sources/TriggerHandler.vhd
+++ b/mupix/sources/TriggerHandler.vhd
@@ -66,6 +66,7 @@ end entity TriggerHandler;
 architecture behavioral of TriggerHandler is
 
 --trigger
+  signal bypass_trigger          : std_logic := '0';
   signal reset_trigger_state     : std_logic                     := '0';
   signal reset_trigger_state_edge : std_logic_vector(1 downto 0) := "00";
   signal valid_trigger_int       : std_logic                     := '0';
@@ -80,7 +81,7 @@ architecture behavioral of TriggerHandler is
   signal fifo_readout_end_int    : std_logic_vector(1 downto 0)  := "00";
 --fee
   signal fee_data_int            : std_logic_vector(31 downto 0) := (others => '0');
-  signal fee_data_write_int      : std_logic                     := '0';
+  signal fee_data_write_int      : std_logic                      := '0';
   signal fee_data_finished_int   : std_logic                     := '0';
   signal fee_trg_release_int     : std_logic                     := '0';
   signal fee_trg_statusbit_int   : std_logic_vector(31 downto 0) := (others => '0');
@@ -124,6 +125,7 @@ architecture behavioral of TriggerHandler is
   type trigger_type_type is (t_timing,
                              t_physics,
                              t_status,
+                             t_ignore,
                              t_unknown);
 
   signal trigger_handler_fsm : trigger_handler_type := idle;
@@ -175,11 +177,21 @@ begin
           trigger_handler_state <= x"01";
           if LVL1_VALID_TIMING_TRG_IN = '1' then
               wr_header_int <= '1';
-              trigger_type <= t_timing;
-              trigger_handler_fsm <= timing_trigger;
+              if bypass_trigger = '1' then
+                trigger_type <= t_ignore;
+                trigger_handler_fsm <= ignore;
+              else
+                trigger_type <= t_timing;
+                trigger_handler_fsm <= timing_trigger;
+              end if;
           elsif(LVL1_VALID_NOTIMING_TRG_IN = '1') then
             wr_header_int <= '1';
-            trigger_handler_fsm <= check_trigger_type;
+            if bypass_trigger = '1' then
+              trigger_type <= t_ignore;
+              trigger_handler_fsm <= ignore;
+            else
+              trigger_handler_fsm <= check_trigger_type;
+            end if;
           end if;
           
         when check_trigger_type =>
@@ -340,6 +352,7 @@ begin
   --0x104: trigger_handler_state
   --0x105: reset counters
   --0x106: reset trigger state machine
+  --0x107: bypass trigger signals flag
  
   slv_bus_handler : process(CLK_IN)
   begin
@@ -357,9 +370,13 @@ begin
          when x"0106" =>
            reset_trigger_state <= SLV_DATA_IN(0);
            slv_ack_out  <= '1';
+         when x"0107"=>
+           bypass_trigger <= SLV_DATA_IN(0);
+           slv_ack_out <= '1';
          when others =>
            slv_unknown_addr_out <= '1';
        end case;
+       
       elsif slv_read_in = '1' then
         case slv_addr_in is
           when x"0100" =>
@@ -377,6 +394,9 @@ begin
           when x"0104" =>
             slv_data_out <= x"000000" & trigger_handler_state;
             slv_ack_out               <= '1';
+          when x"0107" =>
+            slv_data_out(0) <= bypass_trigger; 
+            slv_ack_out <= '1';
           when others =>
             slv_unknown_addr_out <= '1';
         end case;