some further features and fixes for the pulser

diff --git a/pulser/code/single_channel_pulser.vhd b/pulser/code/single_channel_pulser.vhd
index 85f565fa4a0845fb6e4fe4bfbe55c4ff886afa84..a3ffeee5555d98fe0cfbc65661ff10a6da5aa3e5 100644 (file)
--- a/pulser/code/single_channel_pulser.vhd
+++ b/pulser/code/single_channel_pulser.vhd
@@ -59,11 +59,11 @@ end process;
                        end if;\r
                end process;\r
 \r
-       PROC_FREQUENCY : process (CLK)  --It eliminates the offset of -2 for the frequency  \r
+       PROC_FREQUENCY : process (CLK)  --It eliminates the offset of -3 for the frequency  \r
                begin\r
                        if rising_edge(CLK) then\r
-                               if frequency_in >= x"000002" then\r
-                                       frequency_i <= frequency_in-2;\r
+                               if frequency_in >= x"000003" then\r
+                                       frequency_i <= frequency_in-3;\r
                                end if;\r
                        reset_delay <= RESET;   --I want the timer to start again after the operations with the frequency\r
       end if;\r
@@ -84,7 +84,8 @@ end process;
   \r
 last_timer <= timer when rising_edge(CLK);  \r
   \r
-       PROC_PULSE_MANAGER  : process(CLK)        \r
+       PROC_PULSE_MANAGER  : process(CLK)      \r
+         variable p : std_logic_vector(3 downto 0);\r
                begin   \r
                        if RESET = '1' then \r
                                state <= idle;                  \r
@@ -94,22 +95,22 @@ last_timer <= timer when rising_edge(CLK);
                                case state is\r
                                \r
                                        when idle =>    \r
-            PULSE <= "0000";\r
+            p := "0000";\r
             pulse_width_i <= pulse_width_in;\r
             \r
-                                               if last_timer = x"000000" and ENABLE = '1' then\r
+                                               if last_timer = OFFSET and ENABLE = '1' then\r
                                                        state <= generate_pulse;\r
                                                end if;\r
                                                \r
                                        when generate_pulse =>\r
                                                if pulse_width_i = x"000002" then \r
-                                                       PULSE <= "0011";\r
+                                                       p := "0011";\r
                                                elsif pulse_width_i = x"000003" then \r
-                                                       PULSE <= "0111";\r
+                                                       p := "0111";\r
                                                elsif pulse_width_i >= x"000004" then \r
-                                                       PULSE <= "1111"; \r
+                                                       p := "1111"; \r
                                                else \r
-                                                       PULSE <= "0001";\r
+                                                       p := "0001";\r
                                                end if;\r
             pulse_width_i <= pulse_width_i-4;\r
             \r
@@ -121,10 +122,12 @@ last_timer <= timer when rising_edge(CLK);
                                                \r
                                        when finish =>\r
                                                state <= idle;\r
-                                               PULSE <= "0000";\r
+                                               p := "0000";\r
 \r
                                end case;\r
-                                       \r
+                               \r
+                               PULSE <= p xor (INVERT & INVERT & INVERT & INVERT);     \r
+                               \r
                        end if; \r
                        \r
                        \r