changed in editor

diff --git a/pinout/tomcat_prototype.lpf b/pinout/tomcat_prototype.lpf
index 250a295cc8788fb3e4d197b9edc3c35062e96e48..ce73aaf5f250929ff648f8041a0b20601fc7b9d5 100644 (file)
--- a/pinout/tomcat_prototype.lpf
+++ b/pinout/tomcat_prototype.lpf
@@ -106,15 +106,15 @@ IOBUF  PORT  "TIMING_TEST"     IO_TYPE=LVTTL33 PULLMODE=NONE ;
 #################################################################
 # LVDS interface
 #################################################################
-LOCATE COMP  "INTCOM_9"        SITE "C18" ;
+LOCATE COMP  "INTCOM_9"        SITE "D18" ;
 IOBUF  PORT  "INTCOM_9"        IO_TYPE=LVDS  DIFFRESISTOR=100;
-LOCATE COMP  "INTCOM_8"        SITE "D18" ;
+LOCATE COMP  "INTCOM_8"        SITE "F17" ;
 IOBUF  PORT  "INTCOM_8"        IO_TYPE=LVDS  DIFFRESISTOR=100;
-LOCATE COMP  "INTCOM_7"        SITE "F17" ;
+LOCATE COMP  "INTCOM_7"        SITE "H18" ;
 IOBUF  PORT  "INTCOM_7"        IO_TYPE=LVDS  DIFFRESISTOR=100;
-LOCATE COMP  "INTCOM_6"        SITE "H18" ;
+LOCATE COMP  "INTCOM_6"        SITE "K16" ;
 IOBUF  PORT  "INTCOM_6"        IO_TYPE=LVDS  DIFFRESISTOR=100;
-LOCATE COMP  "INTCOM_5"        SITE "K16" ;
+LOCATE COMP  "INTCOM_5"        SITE "N19" ;
 IOBUF  PORT  "INTCOM_5"        IO_TYPE=LVDS  DIFFRESISTOR=100;
 LOCATE COMP  "INTCOM_4"        SITE "C20" ;
 IOBUF  PORT  "INTCOM_4"        IO_TYPE=LVDS  DIFFRESISTOR=100;

diff --git a/prototype/config.vhd b/prototype/config.vhd
index 79e7647c34a488d0367cf2fbffe64aaa5dd35fb8..6d9e43118da1afb37283ea5c27516142ca8e5a5c 100644 (file)
--- a/prototype/config.vhd
+++ b/prototype/config.vhd
@@ -41,12 +41,12 @@ package config is
     constant USE_RXCLOCK            : integer := c_NO;
    
 --Address settings   
-    constant INIT_ADDRESS           : std_logic_vector := x"F570";
-    constant BROADCAST_SPECIAL_ADDR : std_logic_vector := x"81";
+    constant INIT_ADDRESS           : std_logic_vector := x"F770";
+    constant BROADCAST_SPECIAL_ADDR : std_logic_vector := x"30";
    
-    constant INCLUDE_UART           : integer  := c_NO;  --300 slices
+    constant INCLUDE_UART           : integer  := c_NO; --300 slices
     constant INCLUDE_SPI            : integer  := c_NO; --300 slices
-    constant INCLUDE_LCD            : integer  := c_NO;  --800 slices
+    constant INCLUDE_LCD            : integer  := c_NO; --800 slices
     constant INCLUDE_DEBUG_INTERFACE: integer  := c_NO; --300 slices
 
     --input monitor and trigger generation logic
@@ -69,7 +69,7 @@ package config is
 ------------------------------------------------------------------------------
     type intlist_t is array(0 to 7) of integer;
     type hw_info_t is array(0 to 7) of unsigned(31 downto 0);
-    constant HW_INFO_BASE            : unsigned(31 downto 0) := x"A5000000";
+    constant HW_INFO_BASE            : unsigned(31 downto 0) := x"A8000000";
     
     constant CLOCK_FREQUENCY_ARR  : intlist_t := (100,120, others => 0);
     constant MEDIA_FREQUENCY_ARR  : intlist_t := (200,240, others => 0);

diff --git a/prototype/tomcat_template.lpf b/prototype/tomcat_template.lpf
index a7c086cdc86d6f58c8a3a5d8ef55ec970ca24890..13d212b04d1c1f60e32046d6c30882ece65c4a86 100644 (file)
--- a/prototype/tomcat_template.lpf
+++ b/prototype/tomcat_template.lpf
@@ -7,8 +7,8 @@ BLOCK RD_DURING_WR_PATHS ;
 # Basic Settings
 #################################################################
 
-FREQUENCY PORT CLK_200       200 MHz;
-FREQUENCY PORT CLK_125       125 MHz;
+#FREQUENCY PORT CLK_200       200 MHz;
+#FREQUENCY PORT CLK_125       125 MHz;
 
 FREQUENCY NET "THE_MEDIA_INTERFACE/gen_pcs0.THE_SERDES/serdes_sync_0_inst/clk_tx_full" 200 MHz;
 FREQUENCY NET "THE_MEDIA_INTERFACE/gen_pcs1.THE_SERDES/serdes_sync_0_inst/clk_tx_full" 200 MHz;
@@ -24,6 +24,11 @@ BLOCK PATH TO   PORT "TEST_LINE*";
 MULTICYCLE TO CELL "THE_MEDIA_INTERFACE/THE_SCI_READER/PROC_SCI_CTRL.BUS_TX*" 10 ns;
 MULTICYCLE TO CELL "THE_MEDIA_INTERFACE/THE_MED_CONTROL/THE_TX/STAT_REG_OUT*" 10 ns;
 
+## read from SCI can be delayed due to long read strobe
+#MULTICYCLE FROM ASIC gen_PCSB.THE_MEDIA_PCSB/gen_SERDES.THE_SERDES/PCSD_INST PIN SCIRDATA* 15 ns;
+## write strobe can be delayed due to A/D being stable after access
+#MULTICYCLE TO   ASIC gen_PCSB.THE_MEDIA_PCSB/gen_SERDES.THE_SERDES/PCSD_INST PIN SCIWSTN   15 ns; 
+
 GSR_NET NET "clear_i"; 
 
 REGION               "MEDIA" "R81C44D" 13 25;