0503 0x500000039018c928
0505 0x740000039018c628
+ 0510 0x330000046efac628
+ 0511 0x6a0000046efac528
+ 0512 0x510000046efaae28
+ 0513 0x8f0000046efab928
+ 0515 0xd60000046efaba28
+
+ 0520 0x6f0000046efa6628
+ 0521 0x8b0000046efa9f28
+ 0522 0x580000046efa6728
+ 0523 0x850000046efae628
+ 0525 0xbc0000046efa9e28
+
+ 0530 0x3d0000046efce928
+ 0531 0x9a0000046f47c128
+ 0532 0x2d0000046f339428
+ 0533 0x1a0000046f339528
+ 0535 0xfd0000046f32e328
+
# setup tdcs on TRB3
#trbcmd w 0xfe48 0xc0 0x00000001 ## logic analyser control register
-trbcmd w 0xfe48 0xc1 0x000f0005 ## trigger window enable & trigger window width
-trbcmd w 0xfe48 0xc2 0x0000000f ## channel 01-31 enable
-trbcmd w 0xfe48 0xc3 0x00000000 ## channel 32-63 enable
+#trbcmd w 0xfe48 0xc1 0x000f0005 ## trigger window enable & trigger window width
+#trbcmd w 0xfe48 0xc2 0x0000000f ## channel 01-31 enable
+#trbcmd w 0xfe48 0xc3 0x00000000 ## channel 32-63 enable
# setup tdc on TRB3 for designs after 20130320
-#trbcmd w 0xfe48 0xc800 0x00000001 ## logic analyser control register
-#trbcmd w 0xfe48 0xc801 0x000f0005 ## trigger window enable & trigger window width
-#trbcmd w 0xfe48 0xc802 0x0000000f ## channel 01-31 enable
-#trbcmd w 0xfe48 0xc803 0x00000000 ## channel 32-63 enable
-#trbcmd w 0xfe48 0xc804 0x00000080 ## data transfer limit
+trbcmd w 0xfe48 0xc800 0x00000001 ## logic analyser control register
+trbcmd w 0xfe48 0xc801 0x000f0005 ## trigger window enable & trigger window width
+trbcmd w 0xfe48 0xc802 0x0000000f ## channel 01-31 enable
+trbcmd w 0xfe48 0xc803 0x00000000 ## channel 32-63 enable
+trbcmd w 0xfe48 0xc804 0x00000080 ## data transfer limit
trbcmd w 0x8000 0xa137 0xfffff # set pulser #1 in CTS to 95Hz