\item[A500] design for TRB5sc, \verb!trb5sc!
\item[A600] design for MDC central, \verb!mdcoep!
\item[A700] design for MDC TDC, \verb!mdctdc!
+ \item[A800] design for TOMcat, \verb!tomcat!
\end{description*}
The lower 16 Bit are used to identify the contents of the design and the AddOn boards they should be used with. Combine
All boards of a given type are accessible in parallel by a broadcast address. This is set by \signal{Broadcast\_Special\_Addr} in the TrbNet endpoint:
\begin{itemize*}
+ \item 0x30 for the TOMcat board
\item 0x40 for the central FPGA
\item 0x45 for the peripheral FPGA
\item 0x48 TDC design for peripheral FPGA