update TRB3sc mimosis readout code

diff --git a/mimosis/settings.sh b/mimosis/settings.sh
index 281509e0fdad9132230a8af4483f54a5cda249c8..8b0d43071c29327a3badb82fe722cf8abf55d343 100755 (executable)
--- a/mimosis/settings.sh
+++ b/mimosis/settings.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-export DAQOPSERVER=jspc55:82
+export DAQOPSERVER=jspc29:82
 
 trbcmd reset
 trbcmd w 0xf3cb 0xa001 0x409c      #40000

diff --git a/mimosis/trb3sc_mimosis.vhd b/mimosis/trb3sc_mimosis.vhd
index 82ff1ffc27d42e8b80eb44b7f3f4ae9aad7bd58b..b3b24a988e4bd618b2aa72f8cb0c8a28db4991a3 100644 (file)
--- a/mimosis/trb3sc_mimosis.vhd
+++ b/mimosis/trb3sc_mimosis.vhd
@@ -160,6 +160,8 @@ architecture trb3sc_arch of trb3sc_mimosis is
   signal input_data                   : std_logic_vector(18 downto 0);
   signal sclk_r, sclk_rr              : std_logic;
   signal last_valid                   : std_logic;
+  signal last_flag                    : std_logic;
+  signal chiptime                     : unsigned(15 downto 0);
   
   attribute syn_keep of GSR_N     : signal is true;
   attribute syn_preserve of GSR_N : signal is true;  
@@ -453,7 +455,7 @@ end generate;
       SPI_MISO_IN => spi_miso,
       SPI_CLK_OUT => spi_clk,
       --Header
-      HEADER_IO   => HDR_IO,
+      HEADER_IO   => open, --HDR_IO,
       --LCD
       LCD_DATA_IN => lcd_data,
       --ADC
@@ -526,17 +528,28 @@ end process;
 ---------------------------------------------------------------------------  
 sclk_r  <= CLK_IN when rising_edge(clk_sys);
 sclk_rr <= sclk_r when rising_edge(clk_sys);
-input_data <=  VALID_IN & CMD_IN & ADDRPIX_IN when rising_edge(clk_sys);
+input_data <=  VALID_IN & CMD_IN(7) & '0' & CMD_IN(5 downto 4) & ADDRPIX_IN when rising_edge(clk_sys);
 
   THE_READER : process begin
     wait until rising_edge(clk_sys);
     fifo_write <= '0';
     
-    if sclk_r = '1' and sclk_rr = '0' then
+    if sclk_r = '0' and sclk_rr = '1' then
+      last_flag  <= input_data(17);
+      if fwd_do_send = '1' and fifo_full = '0' then
+        if input_data(17) = '1' and last_flag = '0' then
+          fifo_data_in <= x"000" & "000" & input_data(18 downto 14) & std_logic_vector(chiptime);
+          fifo_write   <= '1';
+        end if;  
+      end if;
+    
+    elsif sclk_r = '1' and sclk_rr = '0' then
       last_valid <= input_data(18);
+      chiptime <= chiptime + 1;
+      
       if fwd_do_send = '1' and fifo_full = '0' then
-        if input_data(18) = '1' then
-          fifo_data_in <= x"0" & x"000" & input_data(17 downto 14) & "00" & input_data(13 downto 0);
+        if input_data(18) = '1'  then
+          fifo_data_in <= x"000" & "000" & input_data(18 downto 14) & "00" & input_data(13 downto 0);
           fifo_write   <= '1';
         elsif last_valid = '1' then
           fifo_data_in <= x"0FFFFFFFF";
@@ -673,6 +686,32 @@ end process;
 -- Test data
 ---------------------------------------------------------------------------       
   
+
+gen_test_pulse : if 1 = 1 generate
+  signal pulse, pulse_r : std_logic;
+  signal cnt : unsigned(1 downto 0);
+  signal outp : std_logic;
+begin  
+  PROC_TRG_PULSE : process begin
+    wait until rising_edge(clk_sys);
+    pulse  <= CMD_IN(6);
+    pulse_r <= pulse;
+    if pulse = '0' then
+      outp <= '0';
+    end if;    
+    if pulse = '1' and pulse_r = '0' then
+      cnt <= cnt + 1;
+      if cnt = 3 then
+        outp <= '1';
+      end if;
+    end if;
+  end process;
+  
+  HDR_IO(1) <= outp;
+
+end generate;  
+  
+  
 end architecture;
 
 

diff --git a/pinout/trb3sc_mimosis.lpf b/pinout/trb3sc_mimosis.lpf
index 0cc031d4b561a0c69e79bcb03c07af2b6826241e..b06d967921f76a102c230655c0f6292e9c3e9f6f 100644 (file)
--- a/pinout/trb3sc_mimosis.lpf
+++ b/pinout/trb3sc_mimosis.lpf
@@ -258,7 +258,7 @@ LOCATE COMP "HDR_IO_8"                     SITE "AG26";
 LOCATE COMP "HDR_IO_9"                     SITE "AM28";
 LOCATE COMP "HDR_IO_10"                    SITE "AL28";
 DEFINE PORT GROUP "HDR_group" "HDR*" ;
-IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=NONE ;
 
 
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