#Settings for this project
my $TOPNAME = "trb3_central"; #Name of top-level entity
my $BasePath = "../base/"; #path to "base" directory
-my $lattice_path = '/d/jspc29/lattice/diamond/2.2_x64';
-my $synplify_path = '/d/jspc29/lattice/synplify/F-2012.03-SP1/';
+my $lattice_path = '/d/jspc29/lattice/diamond/3.0_x64';
+my $synplify_path = '/d/jspc29/lattice/synplify/I-2013.09-SP1/';
my $lm_license_file_for_synplify = "27000\@localhost";
my $lm_license_file_for_par = "1710\@cronos.e12.physik.tu-muenchen.de";
###################################################################################
-n 1
-y
-s 12
--t 12
+-t 13
-c 1
-e 2
-m nodelist.txt
add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/serdes_onboard_full.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/serdes_onboard_full_125.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/serdes_full_ctc.vhd"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/serdes_full_noctc.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/sfp_0_200_int.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/sfp_0_200_ctc.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/sfp_1_125_int.vhd"
end generate;
gen_full : if FULL_UPLINK = c_YES generate
- THE_MEDIA_UPLINK : trb_net16_med_ecp3_sfp_4
+ THE_MEDIA_UPLINK : entity work.trb_net16_med_ecp3_sfp_4
generic map(
REVERSE_ORDER => c_NO, --order of ports
- FREQUENCY => 200 --run on 200 MHz clock
+ FREQUENCY => 200, --run on 200 MHz clock
+ USE_CTC => c_YES
)
port map(
CLK => clk_200_i,
SD_RXD_N_IN => SFP_RX_N(8 downto 5),
SD_TXD_P_OUT => SFP_TX_P(8 downto 5),
SD_TXD_N_OUT => SFP_TX_N(8 downto 5),
- SD_REFCLK_P_IN => open,
- SD_REFCLK_N_IN => open,
+ SD_REFCLK_P_IN => '0',
+ SD_REFCLK_N_IN => '0',
SD_PRSNT_N_IN => SFP_MOD0(4 downto 1),
SD_LOS_IN => SFP_LOS(4 downto 1),
SD_TXDIS_OUT => SFP_TXDIS(4 downto 1),
REGION "MEDIA_UPLINK" "R98C95" 17 27;
REGION "MEDIA_ONBOARD" "R90C122" 25 40;
-REGION "REGION_SPI" "R13C150D" 12 16 DEVSIZE;
+REGION "REGION_SPI" "R2C110D" 15 15 DEVSIZE;
REGION "REGION_IOBUF" "R10C43D" 88 86 DEVSIZE;
LOCATE UGROUP "gen_single_THE_MEDIA_UPLINK/media_interface_group" REGION "MEDIA_UPLINK" ;
LOCATE UGROUP "THE_MEDIA_ONBOARD/media_interface_group" REGION "MEDIA_ONBOARD" ;
-LOCATE UGROUP "THE_SPI_RELOAD/THE_SPI_MASTER/SPI_group" REGION "REGION_SPI" ;
-LOCATE UGROUP "THE_SPI_RELOAD/THE_SPI_MEMORY/SPI_group" REGION "REGION_SPI" ;
-LOCATE UGROUP "THE_SPI_RELOAD_THE_SPI_MASTER/SPI_group" REGION "REGION_SPI" ;
-LOCATE UGROUP "THE_SPI_RELOAD_THE_SPI_MEMORY/SPI_group" REGION "REGION_SPI" ;
+#LOCATE UGROUP "THE_SPI_RELOAD/THE_SPI_MASTER/SPI_group" REGION "REGION_SPI" ;
+#LOCATE UGROUP "THE_SPI_RELOAD/THE_SPI_MEMORY/SPI_group" REGION "REGION_SPI" ;
+#LOCATE UGROUP "THE_SPI_RELOAD_THE_SPI_MASTER/SPI_group" REGION "REGION_SPI" ;
+#LOCATE UGROUP "THE_SPI_RELOAD_THE_SPI_MEMORY/SPI_group" REGION "REGION_SPI" ;
MULTICYCLE TO CELL "THE_MEDIA_ONBOARD/SCI_DATA_OUT*" 50 ns;