--- /dev/null
+vcd dumpfile vcdfile.vcd
+vcd dumpvars -m /APL1/
+vcd dumpvars -m /API1/MPLEX/
+vcd dumpvars -m /API1/ACTIVE_API/
+vcd dumpvars -m /API1/ACTIVE_API/INIT_SBUF/
+vcd dumpvars -m /API1/ACTIVE_API/FIFO_TO_INT/
+vcd dumpvars -m /API1/IOBUF/
+vcd dumpvars -m /API1/IOBUF/INITOBUF/
+vcd dumpvars -m /API1/IOBUF/REPLYIBUF/
+vcd dumpvars -m /API2/IOBUF/INITIBUF/
+vcd dumpvars -m /API2/IOBUF/INITOBUF/
+vcd dumpvars -m /API2/ACTIVE_API/
+run 10000 ns
+quit
\ No newline at end of file
--- /dev/null
+[size] 1272 936
+[pos] -1 -1
+*-26.799541 2899700000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+@200
+-DUMMY_APL
+@28
+trb_net_dummy_apl_apibuf_testbench.APL1.apl_write_out
+trb_net_dummy_apl_apibuf_testbench.APL1.apl_fifo_full_in
+@22
+#apl_data_out[47:0] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[47] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[46] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[45] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[44] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[43] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[42] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[41] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[40] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[39] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[38] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[37] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[36] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[35] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[34] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[33] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[32] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[31] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[30] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[29] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[28] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[27] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[26] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[25] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[24] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[23] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[22] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[21] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[20] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[19] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[18] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[17] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[16] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[15] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[14] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[13] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[12] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[11] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[10] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[9] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[8] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[7] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[6] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[5] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[4] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[3] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[2] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[1] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_out[0]
+@28
+trb_net_dummy_apl_apibuf_testbench.APL1.apl_send_out
+trb_net_dummy_apl_apibuf_testbench.APL1.apl_run_in
+@22
+#apl_data_in[47:0] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[47] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[46] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[45] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[44] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[43] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[42] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[41] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[40] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[39] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[38] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[37] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[36] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[35] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[34] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[33] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[32] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[31] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[30] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[29] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[28] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[27] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[26] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[25] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[24] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[23] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[22] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[21] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[20] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[19] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[18] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[17] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[16] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[15] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[14] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[13] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[12] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[11] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[10] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[9] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[8] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[7] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[6] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[5] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[4] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[3] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[2] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[1] trb_net_dummy_apl_apibuf_testbench.APL1.apl_data_in[0]
+@28
+#apl_typ_in[2:0] trb_net_dummy_apl_apibuf_testbench.APL1.apl_typ_in[2] trb_net_dummy_apl_apibuf_testbench.APL1.apl_typ_in[1] trb_net_dummy_apl_apibuf_testbench.APL1.apl_typ_in[0]
+trb_net_dummy_apl_apibuf_testbench.APL1.apl_dataready_in
+trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.apl_dataready_out
+@22
+#apl_seqnr_in[7:0] trb_net_dummy_apl_apibuf_testbench.APL1.apl_seqnr_in[7] trb_net_dummy_apl_apibuf_testbench.APL1.apl_seqnr_in[6] trb_net_dummy_apl_apibuf_testbench.APL1.apl_seqnr_in[5] trb_net_dummy_apl_apibuf_testbench.APL1.apl_seqnr_in[4] trb_net_dummy_apl_apibuf_testbench.APL1.apl_seqnr_in[3] trb_net_dummy_apl_apibuf_testbench.APL1.apl_seqnr_in[2] trb_net_dummy_apl_apibuf_testbench.APL1.apl_seqnr_in[1] trb_net_dummy_apl_apibuf_testbench.APL1.apl_seqnr_in[0]
+@200
+-API
+@28
+trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_dataready_out
+trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_read_in
+@22
+#int_init_data_out[50:0] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[50] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[49] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[48] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[47] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[46] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[45] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[44] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[43] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[42] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[41] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[40] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[39] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[38] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[37] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[36] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[35] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[34] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[33] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[32] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[31] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[30] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[29] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[28] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[27] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[26] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[25] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[24] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[23] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[22] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[21] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[20] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[19] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[18] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[17] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[16] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[15] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[14] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[13] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[12] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[11] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[10] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[9] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[8] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[7] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[6] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[5] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[4] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[3] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[2] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[1] trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.int_init_data_out[0]
+@28
+trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.fifo_to_apl_empty
+trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.apl_read_in
+trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.reg_apl_dataready_out
+@200
+-
+-IOBUF
+@22
+#stat_locked[31:0] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[31] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[30] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[29] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[28] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[27] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[26] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[25] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[24] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[23] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[22] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[21] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[20] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[19] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[18] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[17] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[16] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[15] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[14] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[13] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[12] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[11] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[10] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[9] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[8] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[7] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[6] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[5] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[4] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[3] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[2] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[1] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.stat_locked[0]
+@200
+-OBUF
+@28
+trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_dataready_out
+@22
+#med_data_out[50:0] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[50] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[49] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[48] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[47] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[46] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[45] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[44] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[43] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[42] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[41] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[40] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[39] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[38] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[37] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[36] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[35] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[34] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[33] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[32] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[31] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[30] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[29] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[28] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[27] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[26] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[25] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[24] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[23] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[22] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[21] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[20] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[19] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[18] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[17] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[16] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[15] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[14] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[13] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[12] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[11] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[10] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[9] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[8] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[7] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[6] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[5] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[4] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[3] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[2] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[1] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_data_out[0]
+@28
+trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.med_read_in
+@22
+#stat_locked[15:0] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[15] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[14] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[13] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[12] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[11] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[10] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[9] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[8] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[7] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[6] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[5] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[4] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[3] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[2] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[1] trb_net_dummy_apl_apibuf_testbench.API1.IOBUF.INITOBUF.stat_locked[0]
+@200
+-
+-MPLEX
+@28
+trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_dataready_out
+@22
+#med_data_out[51:0] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[51] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[50] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[49] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[48] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[47] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[46] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[45] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[44] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[43] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[42] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[41] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[40] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[39] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[38] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[37] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[36] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[35] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[34] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[33] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[32] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[31] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[30] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[29] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[28] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[27] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[26] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[25] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[24] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[23] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[22] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[21] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[20] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[19] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[18] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[17] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[16] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[15] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[14] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[13] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[12] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[11] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[10] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[9] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[8] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[7] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[6] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[5] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[4] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[3] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[2] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[1] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.med_data_out[0]
+@28
+#int_dataready_in[1:0] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.int_dataready_in[1] trb_net_dummy_apl_apibuf_testbench.API1.MPLEX.int_dataready_in[0]
+@200
+-
+-IBUF (Rec)
+@22
+#stat_locked[15:0] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[15] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[14] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[13] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[12] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[11] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[10] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[9] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[8] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[7] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[6] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[5] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[4] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[3] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[2] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[1] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_locked[0]
+@28
+trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_read_in
+@22
+#fifo_data_out[50:0] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[50] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[49] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[48] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[47] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[46] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[45] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[44] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[43] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[42] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[41] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[40] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[39] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[38] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[37] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[36] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[35] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[34] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[33] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[32] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[31] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[30] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[29] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[28] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[27] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[26] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[25] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[24] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[23] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[22] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[21] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[20] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[19] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[18] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[17] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[16] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[15] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[14] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[13] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[12] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[11] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[10] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[9] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[8] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[7] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[6] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[5] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[4] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[3] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[2] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[1] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.fifo_data_out[0]
+#int_data_out[50:0] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[50] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[49] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[48] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[47] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[46] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[45] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[44] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[43] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[42] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[41] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[40] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[39] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[38] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[37] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[36] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[35] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[34] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[33] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[32] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[31] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[30] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[29] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[28] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[27] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[26] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[25] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[24] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[23] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[22] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[21] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[20] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[19] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[18] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[17] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[16] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[15] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[14] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[13] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[12] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[11] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[10] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[9] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[8] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[7] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[6] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[5] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[4] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[3] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[2] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[1] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.int_data_out[0]
+@28
+trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.reg_eob_out
+@22
+#stat_buffer[31:0] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[31] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[30] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[29] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[28] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[27] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[26] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[25] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[24] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[23] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[22] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[21] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[20] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[19] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[18] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[17] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[16] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[15] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[14] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[13] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[12] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[11] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[10] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[9] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[8] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[7] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[6] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[5] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[4] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[3] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[2] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[1] trb_net_dummy_apl_apibuf_testbench.API2.IOBUF.INITIBUF.stat_buffer[0]
+@200
+-API (bounce)
+@28
+trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_dataready_out
+trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_read_in
+@22
+#int_reply_data_out[50:0] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[50] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[49] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[48] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[47] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[46] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[45] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[44] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[43] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[42] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[41] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[40] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[39] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[38] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[37] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[36] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[35] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[34] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[33] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[32] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[31] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[30] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[29] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[28] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[27] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[26] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[25] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[24] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[23] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[22] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[21] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[20] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[19] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[18] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[17] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[16] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[15] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[14] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[13] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[12] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[11] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[10] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[9] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[8] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[7] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[6] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[5] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[4] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[3] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[2] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[1] trb_net_dummy_apl_apibuf_testbench.API2.ACTIVE_API.int_reply_data_out[0]
+@28
+trb_net_dummy_apl_apibuf_testbench.API1.ACTIVE_API.INIT_SBUF.next_got_overflow
--- /dev/null
+library ieee;
+
+use ieee.std_logic_1164.all;
+USE ieee.std_logic_signed.ALL;
+USE ieee.std_logic_arith.ALL;
+
+USE std.textio.ALL;
+USE ieee.std_logic_textio.ALL;
+
+entity trb_net_dummy_apl_apibuf_testbench is
+
+end trb_net_dummy_apl_apibuf_testbench;
+
+architecture trb_net_dummy_apl_apibuf_testbench_arch of trb_net_dummy_apl_apibuf_testbench is
+
+ signal clk : std_logic := '0';
+ signal reset : std_logic := '1';
+
+component trb_net_active_apimbuf is
+
+ generic (INIT_DEPTH : integer := 3; -- Depth of the FIFO, 2^(n+1), if
+ -- the initibuf
+ REPLY_DEPTH : integer := 3; -- or the replyibuf
+ FIFO_TO_INT_DEPTH : integer := 3; -- Depth of the FIFO, 2^(n+1),
+ -- for the direction to
+ -- internal world
+ FIFO_TO_APL_DEPTH : integer := 3; -- direction to application
+ FIFO_TERM_BUFFER_DEPTH : integer := 0 -- fifo for auto-answering of
+ -- the master path, if set to 0
+ -- no buffer is used at all
+ );
+
+ port(
+ -- Misc
+ CLK : in std_logic;
+ RESET : in std_logic;
+ CLK_EN : in std_logic;
+ -- Media direction port
+ MED_DATAREADY_OUT: out STD_LOGIC; --Data word ready to be read out
+ --by the media (via the TrbNetIOMultiplexer)
+ MED_DATA_OUT: out STD_LOGIC_VECTOR (51 downto 0); -- Data word
+ MED_READ_IN: in STD_LOGIC; -- Media is reading
+
+ MED_DATAREADY_IN: in STD_LOGIC; -- Data word is offered by the Media
+ -- (the IOBUF MUST read)
+ MED_DATA_IN: in STD_LOGIC_VECTOR (51 downto 0); -- Data word
+ MED_READ_OUT: out STD_LOGIC; -- buffer reads a word from media
+ MED_ERROR_IN: in STD_LOGIC_VECTOR (2 downto 0); -- Status bits
+
+ -- APL Transmitter port
+ APL_DATA_IN: in STD_LOGIC_VECTOR (47 downto 0); -- Data word "application to network"
+ APL_WRITE_IN: in STD_LOGIC; -- Data word is valid and should be transmitted
+ APL_FIFO_FULL_OUT: out STD_LOGIC; -- Stop transfer, the fifo is full
+ APL_SHORT_TRANSFER_IN: in STD_LOGIC; --
+ APL_DTYPE_IN: in STD_LOGIC_VECTOR (3 downto 0); -- see NewTriggerBusNetworkDescr
+ APL_ERROR_PATTERN_IN: in STD_LOGIC_VECTOR (31 downto 0); -- see NewTriggerBusNetworkDescr
+ APL_SEND_IN: in STD_LOGIC; -- Release sending of the data
+ APL_TARGET_ADDRESS_IN: in STD_LOGIC_VECTOR (15 downto 0); -- Address of
+ -- the target (only for active APIs)
+
+ -- Receiver port
+ APL_DATA_OUT: out STD_LOGIC_VECTOR (47 downto 0); -- Data word "network to application"
+ APL_TYP_OUT: out STD_LOGIC_VECTOR (2 downto 0); -- Which kind of data word: DAT, HDR or TRM
+ APL_DATAREADY_OUT: out STD_LOGIC; -- Data word is valid and might be read out
+ APL_READ_IN: in STD_LOGIC; -- Read data word
+
+ -- APL Control port
+ APL_RUN_OUT: out STD_LOGIC; -- Data transfer is running
+ APL_MY_ADDRESS_IN: in STD_LOGIC_VECTOR (15 downto 0); -- My own address (temporary solution!!!)
+ APL_SEQNR_OUT: out STD_LOGIC_VECTOR (7 downto 0);
+
+ -- Status and control port => just coming from the iobuf for debugging
+ STAT_GEN: out STD_LOGIC_VECTOR (31 downto 0); -- General Status
+ STAT_LOCKED: out STD_LOGIC_VECTOR (31 downto 0); -- Status of the handshake and buffer control
+ STAT_INIT_BUFFER: out STD_LOGIC_VECTOR (31 downto 0); -- Status of the handshake and buffer control
+ STAT_REPLY_BUFFER: out STD_LOGIC_VECTOR (31 downto 0); -- General Status
+ CTRL_GEN: in STD_LOGIC_VECTOR (31 downto 0);
+ CTRL_LOCKED: in STD_LOGIC_VECTOR (31 downto 0);
+ STAT_CTRL_INIT_BUFFER: in STD_LOGIC_VECTOR (31 downto 0);
+ STAT_CTRL_REPLY_BUFFER: in STD_LOGIC_VECTOR (31 downto 0);
+ MPLEX_CTRL: in STD_LOGIC_VECTOR (31 downto 0)
+ );
+END component;
+
+
+component trb_net_dummy_apl
+ generic (TARGET_ADDRESS : STD_LOGIC_VECTOR (15 downto 0) := x"ffff";
+ PREFILL_LENGTH : integer := 3;
+ TRANSFER_LENGTH : integer := 6); -- length of dummy data
+
+ port(
+ -- Misc
+ CLK : in std_logic;
+ RESET : in std_logic;
+ CLK_EN : in std_logic;
+
+ -- APL Transmitter port
+ APL_DATA_OUT: out STD_LOGIC_VECTOR (47 downto 0); -- Data word "application to network"
+ APL_WRITE_OUT: out STD_LOGIC; -- Data word is valid and should be transmitted
+ APL_FIFO_FULL_IN: in STD_LOGIC; -- Stop transfer, the fifo is full
+ APL_SHORT_TRANSFER_OUT: out STD_LOGIC; --
+ APL_DTYPE_OUT: out STD_LOGIC_VECTOR (3 downto 0); -- see NewTriggerBusNetworkDescr
+ APL_ERROR_PATTERN_OUT: out STD_LOGIC_VECTOR (31 downto 0); -- see NewTriggerBusNetworkDescr
+ APL_SEND_OUT: out STD_LOGIC; -- Release sending of the data
+ APL_TARGET_ADDRESS_OUT: out STD_LOGIC_VECTOR (15 downto 0); -- Address of
+ -- the target (only for active APIs)
+
+ -- Receiver port
+ APL_DATA_IN: in STD_LOGIC_VECTOR (47 downto 0); -- Data word "network to application"
+ APL_TYP_IN: in STD_LOGIC_VECTOR (2 downto 0); -- Which kind of data word: DAT, HDR or TRM
+ APL_DATAREADY_IN: in STD_LOGIC; -- Data word is valid and might be read out
+ APL_READ_OUT: out STD_LOGIC; -- Read data word
+
+ -- APL Control port
+ APL_RUN_IN: in STD_LOGIC; -- Data transfer is running
+ APL_SEQNR_IN: in STD_LOGIC_VECTOR (7 downto 0)
+ );
+END component;
+
+
+signal apl_data_out_apl1: STD_LOGIC_VECTOR (47 downto 0);
+signal apl_write_apl1: STD_LOGIC;
+signal apl_fifo_full_apl1: STD_LOGIC;
+signal apl_short_transfer_apl1: STD_LOGIC;
+signal apl_dtype_apl1: STD_LOGIC_VECTOR (3 downto 0);
+signal apl_error_pattern_apl1: STD_LOGIC_VECTOR (31 downto 0);
+signal apl_send_apl1: STD_LOGIC;
+signal apl_target_adress_apl1: STD_LOGIC_VECTOR (15 downto 0);
+signal apl_data_in_apl1: STD_LOGIC_VECTOR (47 downto 0);
+signal apl_typ_apl1: STD_LOGIC_VECTOR (2 downto 0);
+signal apl_dataready_apl1: STD_LOGIC;
+signal apl_read_apl1: STD_LOGIC;
+signal apl_run_apl1: STD_LOGIC;
+signal apl_seqnr_apl1: STD_LOGIC_VECTOR (7 downto 0);
+
+signal apl_data_out_apl2: STD_LOGIC_VECTOR (47 downto 0);
+signal apl_write_apl2: STD_LOGIC;
+signal apl_fifo_full_apl2: STD_LOGIC;
+signal apl_short_transfer_apl2: STD_LOGIC;
+signal apl_dtype_apl2: STD_LOGIC_VECTOR (3 downto 0);
+signal apl_error_pattern_apl2: STD_LOGIC_VECTOR (31 downto 0);
+signal apl_send_apl2: STD_LOGIC;
+signal apl_target_adress_apl2: STD_LOGIC_VECTOR (15 downto 0);
+signal apl_data_in_apl2: STD_LOGIC_VECTOR (47 downto 0);
+signal apl_typ_apl2: STD_LOGIC_VECTOR (2 downto 0);
+signal apl_dataready_apl2: STD_LOGIC;
+signal apl_read_apl2: STD_LOGIC;
+signal apl_run_apl2: STD_LOGIC;
+signal apl_seqnr_apl2: STD_LOGIC_VECTOR (7 downto 0);
+
+
+signal MED_DATAREADY_1_to_2: STD_LOGIC;
+signal MED_DATAREADY_1_to_2a: STD_LOGIC;
+signal MED_DATA_1_to_2: STD_LOGIC_VECTOR (51 downto 0);
+signal MED_DATA_1_to_2a: STD_LOGIC_VECTOR (51 downto 0);
+signal MED_READ_1_to_2: STD_LOGIC;
+signal MED_READ_1_to_2a: STD_LOGIC;
+signal MED_DATAREADY_2_to_1: STD_LOGIC;
+signal MED_DATAREADY_2_to_1a: STD_LOGIC;
+signal MED_DATA_2_to_1: STD_LOGIC_VECTOR (51 downto 0);
+signal MED_DATA_2_to_1a: STD_LOGIC_VECTOR (51 downto 0);
+signal MED_READ_2_to_1: STD_LOGIC;
+signal MED_READ_2_to_1a: STD_LOGIC;
+
+-- a is delayed signal
+
+signal ctrl: std_logic_vector(31 downto 0) := (others => '0');
+
+begin
+
+
+ clk <= not clk after 5ns;
+
+ MED_DATAREADY_1_to_2a <= MED_DATAREADY_1_to_2;
+ MED_DATA_1_to_2a <= MED_DATA_1_to_2;
+ MED_READ_1_to_2a <= MED_READ_1_to_2;
+ MED_DATAREADY_2_to_1a <= MED_DATAREADY_2_to_1;
+ MED_DATA_2_to_1a <= MED_DATA_2_to_1;
+ MED_READ_2_to_1a <= MED_READ_2_to_1;
+
+
+ DO_RESET : process
+ begin
+ reset <= '1';
+ wait for 30ns;
+ reset <= '0';
+ ctrl(8 downto 0) <= "100000000"; --only fixed
+-- ctrl(8 downto 0) <= "111111111"; --only rr
+-- ctrl(8 downto 0) <= "101010101"; --mixed
+ wait for 20ns;
+ ctrl(8 downto 0) <= "000000000";
+ wait;
+ end process DO_RESET;
+
+-------------------------------------------------------------------------------
+-- the 2 APLs
+-------------------------------------------------------------------------------
+
+APL1: trb_net_dummy_apl
+ generic map (
+ TARGET_ADDRESS => x"0002",
+-- TARGET_ADDRESS => x"000f",
+ PREFILL_LENGTH => 0,
+-- TRANSFER_LENGTH => 4)
+ TRANSFER_LENGTH => 16)
+ port map (
+ CLK => clk,
+ RESET => reset,
+ CLK_EN => '1',
+
+ -- APL Transmitter port
+ APL_DATA_OUT => apl_data_out_apl1,
+ APL_WRITE_OUT => apl_write_apl1,
+ APL_FIFO_FULL_IN => apl_fifo_full_apl1,
+ APL_SHORT_TRANSFER_OUT => apl_short_transfer_apl1,
+ APL_DTYPE_OUT => apl_dtype_apl1,
+ APL_ERROR_PATTERN_OUT => apl_error_pattern_apl1,
+ APL_SEND_OUT => apl_send_apl1,
+ APL_TARGET_ADDRESS_OUT => apl_target_adress_apl1,
+
+ -- Receiver port
+ APL_DATA_IN => apl_data_in_apl1,
+ APL_TYP_IN => apl_typ_apl1,
+ APL_DATAREADY_IN => apl_dataready_apl1,
+ APL_READ_OUT => apl_read_apl1,
+
+ -- APL Control port
+ APL_RUN_IN => apl_run_apl1,
+ APL_SEQNR_IN => apl_seqnr_apl1
+ );
+
+APL2: trb_net_dummy_apl
+ generic map (
+ TARGET_ADDRESS => x"0001",
+ PREFILL_LENGTH => 0,
+-- TRANSFER_LENGTH => 2)
+ TRANSFER_LENGTH => 8)
+ port map (
+ CLK => clk,
+ RESET => reset,
+ CLK_EN => '1',
+
+ -- APL Transmitter port
+ APL_DATA_OUT => apl_data_out_apl2,
+ APL_WRITE_OUT => apl_write_apl2,
+ APL_FIFO_FULL_IN => apl_fifo_full_apl2,
+ APL_SHORT_TRANSFER_OUT => apl_short_transfer_apl2,
+ APL_DTYPE_OUT => apl_dtype_apl2,
+ APL_ERROR_PATTERN_OUT => apl_error_pattern_apl2,
+ APL_SEND_OUT => apl_send_apl2,
+ APL_TARGET_ADDRESS_OUT => apl_target_adress_apl2,
+
+ -- Receiver port
+ APL_DATA_IN => apl_data_in_apl2,
+ APL_TYP_IN => apl_typ_apl2,
+ APL_DATAREADY_IN => apl_dataready_apl2,
+ APL_READ_OUT => apl_read_apl2,
+
+ -- APL Control port
+ APL_RUN_IN => apl_run_apl2,
+ APL_SEQNR_IN => apl_seqnr_apl2
+ );
+
+-------------------------------------------------------------------------------
+-- the 2 APIs
+-------------------------------------------------------------------------------
+
+API1: trb_net_active_apimbuf
+ generic map (
+ FIFO_TERM_BUFFER_DEPTH => 3)
+ port map (
+ CLK => clk,
+ RESET => reset,
+ CLK_EN => '1',
+
+ -- APL Transmitter port
+ APL_DATA_IN => apl_data_out_apl1,
+ APL_WRITE_IN => apl_write_apl1,
+ APL_FIFO_FULL_OUT => apl_fifo_full_apl1,
+ APL_SHORT_TRANSFER_IN => apl_short_transfer_apl1,
+ APL_DTYPE_IN => apl_dtype_apl1,
+ APL_ERROR_PATTERN_IN => apl_error_pattern_apl1,
+ APL_SEND_IN => apl_send_apl1,
+ APL_TARGET_ADDRESS_IN => apl_target_adress_apl1,
+
+ -- Receiver port
+ APL_DATA_OUT => apl_data_in_apl1,
+ APL_TYP_OUT => apl_typ_apl1,
+ APL_DATAREADY_OUT => apl_dataready_apl1,
+ APL_READ_IN => apl_read_apl1,
+
+ -- APL Control port
+ APL_RUN_OUT => apl_run_apl1,
+ APL_SEQNR_OUT => apl_seqnr_apl1,
+ APL_MY_ADDRESS_IN => x"0001",
+
+ MED_DATAREADY_OUT => MED_DATAREADY_1_to_2,
+ MED_DATA_OUT => MED_DATA_1_to_2,
+ MED_READ_IN => MED_READ_1_to_2a,
+ MED_ERROR_IN => (others => '0'),
+ MED_DATAREADY_IN => MED_DATAREADY_2_to_1a,
+ MED_DATA_IN => MED_DATA_2_to_1a,
+ MED_READ_OUT => MED_READ_2_to_1,
+
+ CTRL_LOCKED => (others => '0'),
+ CTRL_GEN => (others => '0'),
+
+ STAT_CTRL_INIT_BUFFER => (others => '0'),
+ STAT_CTRL_REPLY_BUFFER => (others => '0'),
+ MPLEX_CTRL => ctrl
+ );
+
+API2: trb_net_active_apimbuf
+ generic map (
+ FIFO_TERM_BUFFER_DEPTH => 3)
+ port map (
+ CLK => clk,
+ RESET => reset,
+ CLK_EN => '1',
+
+ -- APL Transmitter port
+ APL_DATA_IN => apl_data_out_apl2,
+ APL_WRITE_IN => apl_write_apl2,
+ APL_FIFO_FULL_OUT => apl_fifo_full_apl2,
+ APL_SHORT_TRANSFER_IN => apl_short_transfer_apl2,
+ APL_DTYPE_IN => apl_dtype_apl2,
+ APL_ERROR_PATTERN_IN => apl_error_pattern_apl2,
+ APL_SEND_IN => apl_send_apl2,
+ APL_TARGET_ADDRESS_IN => apl_target_adress_apl2,
+
+ -- Receiver port
+ APL_DATA_OUT => apl_data_in_apl2,
+ APL_TYP_OUT => apl_typ_apl2,
+ APL_DATAREADY_OUT => apl_dataready_apl2,
+ APL_READ_IN => apl_read_apl2,
+
+ -- APL Control port
+ APL_RUN_OUT => apl_run_apl2,
+ APL_SEQNR_OUT => apl_seqnr_apl2,
+ APL_MY_ADDRESS_IN => x"0002",
+
+ MED_DATAREADY_OUT => MED_DATAREADY_2_to_1,
+ MED_DATA_OUT => MED_DATA_2_to_1,
+ MED_READ_IN => MED_READ_2_to_1a,
+ MED_ERROR_IN => (others => '0'),
+ MED_DATAREADY_IN => MED_DATAREADY_1_to_2a,
+ MED_DATA_IN => MED_DATA_1_to_2a,
+ MED_READ_OUT => MED_READ_1_to_2,
+
+
+ CTRL_LOCKED => (others => '0'),
+ CTRL_GEN => (others => '0'),
+
+ STAT_CTRL_INIT_BUFFER => (others => '0'),
+ STAT_CTRL_REPLY_BUFFER => (others => '0'),
+ MPLEX_CTRL => ctrl
+ );
+
+end trb_net_dummy_apl_apibuf_testbench_arch;
+
+
+-- fuse -prj trb_net_dummy_apl_apibuf_m_testbench_beh.prj -top trb_net_dummy_apl_apibuf_testbench -o trb_net_dummy_apl_apimbuf_testbench
+
+-- trb_net_dummy_apl_apimbuf_testbench -tclbatch apl_apimbuf_testsim.tcl
+
+-- ntrace select -o on -m / -l this
+-- ntrace start
+-- run 1000 ns
+-- quit
+
+-- isimwave isimwavedata.xwv
+-- gtkwave vcdfile.vcd settings_aplbuf.sav &
--- /dev/null
+vhdl work "../trb_net_std.vhd"
+vhdl work "../trb_net_fifo.vhd"
+vhdl work "../xilinx/trb_net_fifo_arch.vhd"
+vhdl work "../xilinx/shift_lut_x16.vhd"
+vhdl work "../trb_net_sbuf.vhd"
+vhdl work "../trb_net_ibuf.vhd"
+vhdl work "../trb_net_obuf.vhd"
+vhdl work "../trb_net_iobuf.vhd"
+vhdl work "../trb_net_active_api.vhd"
+vhdl work "../trb_net_active_apibuf.vhd"
+vhdl work "../trb_net_active_apimbuf.vhd"
+vhdl work "trb_net_dummy_apl.vhd"
+vhdl work "trb_net_dummy_apl_apibuf_m_testbench.vhd"
next_registered_trailer, fifo_to_int_data_out, fifo_to_apl_empty,
INT_REPLY_DATAREADY_IN, reg_INT_REPLY_READ_OUT,fifo_to_apl_read,
reg_APL_DATAREADY_OUT, fifo_to_apl_data_out, reg_APL_DATAREADY_OUT,
- APL_READ_IN, sbuf_free)
+ APL_READ_IN, sbuf_free, reg_APL_TYP_OUT)
begin -- process
next_state <= MY_ERROR;
next_registered_header <= registered_header;
--- /dev/null
+-- an active api together with an iobuf
+
+LIBRARY IEEE;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE IEEE.STD_LOGIC_ARITH.ALL;
+USE IEEE.STD_LOGIC_UNSIGNED.ALL;
+
+use work.trb_net_std.all;
+
+--Entity decalaration for clock generator
+entity trb_net_active_apimbuf is
+
+ generic (INIT_DEPTH : integer := 3; -- Depth of the FIFO, 2^(n+1), if
+ -- the initibuf
+ REPLY_DEPTH : integer := 3; -- or the replyibuf
+ FIFO_TO_INT_DEPTH : integer := 3; -- Depth of the FIFO, 2^(n+1),
+ -- for the direction to
+ -- internal world
+ FIFO_TO_APL_DEPTH : integer := 3; -- direction to application
+ FIFO_TERM_BUFFER_DEPTH : integer := 0 -- fifo for auto-answering of
+ -- the master path, if set to 0
+ -- no buffer is used at all
+ );
+
+ port(
+ -- Misc
+ CLK : in std_logic;
+ RESET : in std_logic;
+ CLK_EN : in std_logic;
+ -- Media direction port
+ MED_DATAREADY_OUT: out STD_LOGIC; --Data word ready to be read out
+ --by the media (via the TrbNetIOMultiplexer)
+ MED_DATA_OUT: out STD_LOGIC_VECTOR (51 downto 0); -- Data word
+ MED_READ_IN: in STD_LOGIC; -- Media is reading
+
+ MED_DATAREADY_IN: in STD_LOGIC; -- Data word is offered by the Media
+ -- (the IOBUF MUST read)
+ MED_DATA_IN: in STD_LOGIC_VECTOR (51 downto 0); -- Data word
+ MED_READ_OUT: out STD_LOGIC; -- buffer reads a word from media
+ MED_ERROR_IN: in STD_LOGIC_VECTOR (2 downto 0); -- Status bits
+
+
+ -- APL Transmitter port
+ APL_DATA_IN: in STD_LOGIC_VECTOR (47 downto 0); -- Data word "application to network"
+ APL_WRITE_IN: in STD_LOGIC; -- Data word is valid and should be transmitted
+ APL_FIFO_FULL_OUT: out STD_LOGIC; -- Stop transfer, the fifo is full
+ APL_SHORT_TRANSFER_IN: in STD_LOGIC; --
+ APL_DTYPE_IN: in STD_LOGIC_VECTOR (3 downto 0); -- see NewTriggerBusNetworkDescr
+ APL_ERROR_PATTERN_IN: in STD_LOGIC_VECTOR (31 downto 0); -- see NewTriggerBusNetworkDescr
+ APL_SEND_IN: in STD_LOGIC; -- Release sending of the data
+ APL_TARGET_ADDRESS_IN: in STD_LOGIC_VECTOR (15 downto 0); -- Address of
+ -- the target (only for active APIs)
+
+ -- Receiver port
+ APL_DATA_OUT: out STD_LOGIC_VECTOR (47 downto 0); -- Data word "network to application"
+ APL_TYP_OUT: out STD_LOGIC_VECTOR (2 downto 0); -- Which kind of data word: DAT, HDR or TRM
+ APL_DATAREADY_OUT: out STD_LOGIC; -- Data word is valid and might be read out
+ APL_READ_IN: in STD_LOGIC; -- Read data word
+
+ -- APL Control port
+ APL_RUN_OUT: out STD_LOGIC; -- Data transfer is running
+ APL_MY_ADDRESS_IN: in STD_LOGIC_VECTOR (15 downto 0); -- My own address (temporary solution!!!)
+ APL_SEQNR_OUT: out STD_LOGIC_VECTOR (7 downto 0);
+
+ -- Status and control port => just coming from the iobuf for debugging
+ STAT_GEN: out STD_LOGIC_VECTOR (31 downto 0); -- General Status
+ STAT_LOCKED: out STD_LOGIC_VECTOR (31 downto 0); -- Status of the handshake and buffer control
+ STAT_INIT_BUFFER: out STD_LOGIC_VECTOR (31 downto 0); -- Status of the handshake and buffer control
+ STAT_REPLY_BUFFER: out STD_LOGIC_VECTOR (31 downto 0); -- General Status
+ CTRL_GEN: in STD_LOGIC_VECTOR (31 downto 0);
+ CTRL_LOCKED: in STD_LOGIC_VECTOR (31 downto 0);
+ STAT_CTRL_INIT_BUFFER: in STD_LOGIC_VECTOR (31 downto 0);
+ STAT_CTRL_REPLY_BUFFER: in STD_LOGIC_VECTOR (31 downto 0);
+ MPLEX_CTRL: in STD_LOGIC_VECTOR (31 downto 0)
+ );
+END trb_net_active_apimbuf;
+
+architecture trb_net_active_apimbuf_arch of trb_net_active_apimbuf is
+
+component trb_net_iobuf is
+
+ generic (INIT_DEPTH : integer := 3; -- Depth of the FIFO, 2^(n+1), if
+ -- the initibuf
+ REPLY_DEPTH : integer := 3); -- or the replyibuf
+
+ port(
+ -- Misc
+ CLK : in std_logic;
+ RESET : in std_logic;
+ CLK_EN : in std_logic;
+ -- Media direction port
+ MED_INIT_DATAREADY_OUT: out STD_LOGIC; --Data word ready to be read out
+ --by the media (via the TrbNetIOMultiplexer)
+ MED_INIT_DATA_OUT: out STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ MED_INIT_READ_IN: in STD_LOGIC; -- Media is reading
+
+ MED_INIT_DATAREADY_IN: in STD_LOGIC; -- Data word is offered by the Media
+ -- (the IOBUF MUST read)
+ MED_INIT_DATA_IN: in STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ MED_INIT_READ_OUT: out STD_LOGIC; -- buffer reads a word from media
+ MED_INIT_ERROR_IN: in STD_LOGIC_VECTOR (2 downto 0); -- Status bits
+
+ MED_REPLY_DATAREADY_OUT: out STD_LOGIC; --Data word ready to be read out
+ --by the media (via the TrbNetIOMultiplexer)
+ MED_REPLY_DATA_OUT: out STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ MED_REPLY_READ_IN: in STD_LOGIC; -- Media is reading
+
+ MED_REPLY_DATAREADY_IN: in STD_LOGIC; -- Data word is offered by the Media
+ -- (the IOBUF MUST read)
+ MED_REPLY_DATA_IN: in STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ MED_REPLY_READ_OUT: out STD_LOGIC; -- buffer reads a word from media
+ MED_REPLY_ERROR_IN: in STD_LOGIC_VECTOR (2 downto 0); -- Status bits
+
+ -- Internal direction port
+
+ INT_INIT_DATAREADY_OUT: out STD_LOGIC;
+ INT_INIT_DATA_OUT: out STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ INT_INIT_READ_IN: in STD_LOGIC;
+
+ INT_INIT_DATAREADY_IN: in STD_LOGIC;
+ INT_INIT_DATA_IN: in STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ INT_INIT_READ_OUT: out STD_LOGIC;
+
+ INT_REPLY_HEADER_IN: in STD_LOGIC; -- Concentrator kindly asks to resend the last
+ -- header (only for the reply path)
+ INT_REPLY_DATAREADY_OUT: out STD_LOGIC;
+ INT_REPLY_DATA_OUT: out STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ INT_REPLY_READ_IN: in STD_LOGIC;
+
+ INT_REPLY_DATAREADY_IN: in STD_LOGIC;
+ INT_REPLY_DATA_IN: in STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ INT_REPLY_READ_OUT: out STD_LOGIC;
+
+ -- Status and control port
+ STAT_GEN: out STD_LOGIC_VECTOR (31 downto 0); -- General Status
+ STAT_LOCKED: out STD_LOGIC_VECTOR (31 downto 0); -- Status of the handshake and buffer control
+ STAT_INIT_BUFFER: out STD_LOGIC_VECTOR (31 downto 0); -- Status of the handshake and buffer control
+ STAT_REPLY_BUFFER: out STD_LOGIC_VECTOR (31 downto 0); -- General Status
+ CTRL_GEN: in STD_LOGIC_VECTOR (31 downto 0);
+ CTRL_LOCKED: in STD_LOGIC_VECTOR (31 downto 0);
+ STAT_CTRL_INIT_BUFFER: in STD_LOGIC_VECTOR (31 downto 0);
+ STAT_CTRL_REPLY_BUFFER: in STD_LOGIC_VECTOR (31 downto 0)
+ );
+END component;
+
+component trb_net_active_api is
+
+ generic (FIFO_TO_INT_DEPTH : integer := 3; -- Depth of the FIFO, 2^(n+1),
+ -- for the direction to
+ -- internal world
+ FIFO_TO_APL_DEPTH : integer := 3; -- direction to application
+ FIFO_TERM_BUFFER_DEPTH : integer := 0); -- fifo for auto-answering of
+ -- the master path, if set to 0
+ -- no buffer is used at all
+
+
+ port(
+ -- Misc
+ CLK : in std_logic;
+ RESET : in std_logic;
+ CLK_EN : in std_logic;
+
+ -- APL Transmitter port
+ APL_DATA_IN: in STD_LOGIC_VECTOR (47 downto 0); -- Data word "application to network"
+ APL_WRITE_IN: in STD_LOGIC; -- Data word is valid and should be transmitted
+ APL_FIFO_FULL_OUT: out STD_LOGIC; -- Stop transfer, the fifo is full
+ APL_SHORT_TRANSFER_IN: in STD_LOGIC; --
+ APL_DTYPE_IN: in STD_LOGIC_VECTOR (3 downto 0); -- see NewTriggerBusNetworkDescr
+ APL_ERROR_PATTERN_IN: in STD_LOGIC_VECTOR (31 downto 0); -- see NewTriggerBusNetworkDescr
+ APL_SEND_IN: in STD_LOGIC; -- Release sending of the data
+ APL_TARGET_ADDRESS_IN: in STD_LOGIC_VECTOR (15 downto 0); -- Address of
+ -- the target (only for active APIs)
+
+ -- Receiver port
+ APL_DATA_OUT: out STD_LOGIC_VECTOR (47 downto 0); -- Data word "network to application"
+ APL_TYP_OUT: out STD_LOGIC_VECTOR (2 downto 0); -- Which kind of data word: DAT, HDR or TRM
+ APL_DATAREADY_OUT: out STD_LOGIC; -- Data word is valid and might be read out
+ APL_READ_IN: in STD_LOGIC; -- Read data word
+
+ -- APL Control port
+ APL_RUN_OUT: out STD_LOGIC; -- Data transfer is running
+ APL_MY_ADDRESS_IN: in STD_LOGIC_VECTOR (15 downto 0); -- My own address (temporary solution!!!)
+ APL_SEQNR_OUT: out STD_LOGIC_VECTOR (7 downto 0);
+
+ -- Internal direction port
+ -- This is just a clone from trb_net_iobuf
+
+ INT_INIT_DATAREADY_OUT: out STD_LOGIC;
+ INT_INIT_DATA_OUT: out STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ INT_INIT_READ_IN: in STD_LOGIC;
+
+ INT_INIT_DATAREADY_IN: in STD_LOGIC;
+ INT_INIT_DATA_IN: in STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ INT_INIT_READ_OUT: out STD_LOGIC;
+
+
+ INT_REPLY_HEADER_IN: in STD_LOGIC; -- Concentrator kindly asks to resend the last
+ -- header (only for the reply path)
+ INT_REPLY_DATAREADY_OUT: out STD_LOGIC;
+ INT_REPLY_DATA_OUT: out STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ INT_REPLY_READ_IN: in STD_LOGIC;
+
+ INT_REPLY_DATAREADY_IN: in STD_LOGIC;
+ INT_REPLY_DATA_IN: in STD_LOGIC_VECTOR (50 downto 0); -- Data word
+ INT_REPLY_READ_OUT: out STD_LOGIC
+
+ -- Status and control port
+
+ -- not needed now, but later
+
+ );
+END component;
+
+component trb_net_io_multiplexer is
+
+ generic (BUS_WIDTH : integer := 56;
+ MULT_WIDTH : integer := 5);
+
+ port(
+ -- Misc
+ CLK : in std_logic;
+ RESET : in std_logic;
+ CLK_EN : in std_logic;
+ -- Media direction port
+ MED_DATAREADY_IN: in STD_LOGIC;
+ MED_DATA_IN: in STD_LOGIC_VECTOR (BUS_WIDTH-1 downto 0);
+ -- highest bits are mult.
+ MED_READ_OUT: out STD_LOGIC;
+
+ MED_DATAREADY_OUT: out STD_LOGIC;
+ MED_DATA_OUT: out STD_LOGIC_VECTOR (BUS_WIDTH-1 downto 0);
+ MED_READ_IN: in STD_LOGIC;
+
+ -- Internal direction port
+ INT_DATAREADY_OUT: out STD_LOGIC_VECTOR (2**MULT_WIDTH-1 downto 0);
+ INT_DATA_OUT: out STD_LOGIC_VECTOR ((BUS_WIDTH-MULT_WIDTH)*(2**MULT_WIDTH)-1 downto 0);
+ INT_READ_IN: in STD_LOGIC_VECTOR (2**MULT_WIDTH-1 downto 0);
+
+ INT_DATAREADY_IN: in STD_LOGIC_VECTOR (2**MULT_WIDTH-1 downto 0);
+ INT_DATA_IN: in STD_LOGIC_VECTOR ((BUS_WIDTH-MULT_WIDTH)*(2**MULT_WIDTH)-1 downto 0);
+ INT_READ_OUT: out STD_LOGIC_VECTOR (2**MULT_WIDTH-1 downto 0);
+
+ -- Status and control port
+ CTRL: in STD_LOGIC_VECTOR (31 downto 0);
+ STAT: out STD_LOGIC_VECTOR (31 downto 0)
+ );
+END component;
+
+signal apl_to_buf_INIT_DATAREADY: STD_LOGIC;
+signal apl_to_buf_INIT_DATA : STD_LOGIC_VECTOR (50 downto 0);
+signal apl_to_buf_INIT_READ : STD_LOGIC;
+
+signal buf_to_apl_INIT_DATAREADY: STD_LOGIC;
+signal buf_to_apl_INIT_DATA : STD_LOGIC_VECTOR (50 downto 0);
+signal buf_to_apl_INIT_READ : STD_LOGIC;
+
+signal apl_to_buf_REPLY_DATAREADY: STD_LOGIC;
+signal apl_to_buf_REPLY_DATA : STD_LOGIC_VECTOR (50 downto 0);
+signal apl_to_buf_REPLY_READ : STD_LOGIC;
+
+signal buf_to_apl_REPLY_DATAREADY: STD_LOGIC;
+signal buf_to_apl_REPLY_DATA : STD_LOGIC_VECTOR (50 downto 0);
+signal buf_to_apl_REPLY_READ : STD_LOGIC;
+
+-- for the connection to the multiplexer
+signal MED_INIT_DATAREADY_OUT : STD_LOGIC;
+signal MED_INIT_DATA_OUT : STD_LOGIC_VECTOR (50 downto 0);
+signal MED_INIT_READ_IN : STD_LOGIC;
+
+signal MED_INIT_DATAREADY_IN : STD_LOGIC;
+signal MED_INIT_DATA_IN : STD_LOGIC_VECTOR (50 downto 0);
+signal MED_INIT_READ_OUT : STD_LOGIC;
+
+signal MED_REPLY_DATAREADY_OUT : STD_LOGIC;
+signal MED_REPLY_DATA_OUT : STD_LOGIC_VECTOR (50 downto 0);
+signal MED_REPLY_READ_IN : STD_LOGIC;
+
+signal MED_REPLY_DATAREADY_IN : STD_LOGIC;
+signal MED_REPLY_DATA_IN : STD_LOGIC_VECTOR (50 downto 0);
+signal MED_REPLY_READ_OUT : STD_LOGIC;
+
+signal m_DATAREADY_OUT : STD_LOGIC_VECTOR (1 downto 0);
+signal m_DATA_OUT : STD_LOGIC_VECTOR (101 downto 0);
+signal m_READ_IN : STD_LOGIC_VECTOR (1 downto 0);
+
+signal m_DATAREADY_IN : STD_LOGIC_VECTOR (1 downto 0);
+signal m_DATA_IN : STD_LOGIC_VECTOR (101 downto 0);
+signal m_READ_OUT : STD_LOGIC_VECTOR (1 downto 0);
+
+begin
+
+ m_DATAREADY_OUT(0) <= MED_INIT_DATAREADY_OUT;
+ m_DATAREADY_OUT(1) <= MED_REPLY_DATAREADY_OUT;
+ m_DATA_OUT(50 downto 0) <= MED_INIT_DATA_OUT;
+ m_DATA_OUT(101 downto 51) <= MED_REPLY_DATA_OUT;
+ MED_INIT_READ_IN <= m_READ_IN(0);
+ MED_REPLY_READ_IN <= m_READ_IN(1);
+
+ MED_INIT_DATAREADY_IN <= m_DATAREADY_IN(0);
+ MED_REPLY_DATAREADY_IN <= m_DATAREADY_IN(1);
+ MED_INIT_DATA_IN <= m_DATA_IN(50 downto 0);
+ MED_REPLY_DATA_IN <= m_DATA_IN(101 downto 51);
+ m_READ_OUT(0) <= MED_INIT_READ_OUT;
+ m_READ_OUT(1) <= MED_REPLY_READ_OUT;
+
+
+ ACTIVE_API: trb_net_active_api
+
+ generic map (FIFO_TO_INT_DEPTH => FIFO_TO_INT_DEPTH,
+ FIFO_TO_APL_DEPTH => FIFO_TO_APL_DEPTH,
+ FIFO_TERM_BUFFER_DEPTH => FIFO_TERM_BUFFER_DEPTH)
+
+ port map (
+ -- Misc
+ CLK => CLK,
+ RESET => RESET,
+ CLK_EN => CLK_EN,
+
+ -- APL Transmitter port
+ APL_DATA_IN => APL_DATA_IN,
+ APL_WRITE_IN => APL_WRITE_IN,
+ APL_FIFO_FULL_OUT => APL_FIFO_FULL_OUT,
+ APL_SHORT_TRANSFER_IN => APL_SHORT_TRANSFER_IN,
+ APL_DTYPE_IN => APL_DTYPE_IN,
+ APL_ERROR_PATTERN_IN => APL_ERROR_PATTERN_IN,
+ APL_SEND_IN => APL_SEND_IN,
+ APL_TARGET_ADDRESS_IN => APL_TARGET_ADDRESS_IN,
+
+ -- Receiver port
+ APL_DATA_OUT => APL_DATA_OUT,
+ APL_TYP_OUT => APL_TYP_OUT,
+ APL_DATAREADY_OUT => APL_DATAREADY_OUT,
+ APL_READ_IN => APL_READ_IN,
+
+ -- APL Control port
+ APL_RUN_OUT => APL_RUN_OUT,
+ APL_MY_ADDRESS_IN => APL_MY_ADDRESS_IN,
+ APL_SEQNR_OUT => APL_SEQNR_OUT,
+
+ -- Internal direction port
+ -- connect via private signals
+
+ INT_INIT_DATAREADY_OUT => apl_to_buf_INIT_DATAREADY,
+ INT_INIT_DATA_OUT => apl_to_buf_INIT_DATA,
+ INT_INIT_READ_IN => apl_to_buf_INIT_READ,
+
+ INT_INIT_DATAREADY_IN => buf_to_apl_INIT_DATAREADY,
+ INT_INIT_DATA_IN => buf_to_apl_INIT_DATA,
+ INT_INIT_READ_OUT => buf_to_apl_INIT_READ,
+
+ INT_REPLY_HEADER_IN => '0',
+ INT_REPLY_DATAREADY_OUT =>apl_to_buf_REPLY_DATAREADY,
+ INT_REPLY_DATA_OUT => apl_to_buf_REPLY_DATA,
+ INT_REPLY_READ_IN => apl_to_buf_REPLY_READ,
+
+ INT_REPLY_DATAREADY_IN => buf_to_apl_REPLY_DATAREADY,
+ INT_REPLY_DATA_IN => buf_to_apl_REPLY_DATA,
+ INT_REPLY_READ_OUT => buf_to_apl_REPLY_READ
+
+ -- Status and control port
+ -- not needed now, but later
+ );
+
+IOBUF: trb_net_iobuf
+
+ generic map (INIT_DEPTH => INIT_DEPTH,
+ REPLY_DEPTH => REPLY_DEPTH)
+
+ port map (
+ -- Misc
+ CLK => CLK ,
+ RESET => RESET,
+ CLK_EN => CLK_EN,
+ -- Media direction port
+ MED_INIT_DATAREADY_OUT => MED_INIT_DATAREADY_OUT,
+ MED_INIT_DATA_OUT => MED_INIT_DATA_OUT,
+ MED_INIT_READ_IN => MED_INIT_READ_IN,
+
+ MED_INIT_DATAREADY_IN => MED_INIT_DATAREADY_IN,
+ MED_INIT_DATA_IN => MED_INIT_DATA_IN,
+ MED_INIT_READ_OUT => MED_INIT_READ_OUT,
+ MED_INIT_ERROR_IN => (others => '0'),
+
+ MED_REPLY_DATAREADY_OUT => MED_REPLY_DATAREADY_OUT,
+ MED_REPLY_DATA_OUT => MED_REPLY_DATA_OUT,
+ MED_REPLY_READ_IN => MED_REPLY_READ_IN,
+
+ MED_REPLY_DATAREADY_IN => MED_REPLY_DATAREADY_IN,
+ MED_REPLY_DATA_IN => MED_REPLY_DATA_IN,
+ MED_REPLY_READ_OUT => MED_REPLY_READ_OUT,
+ MED_REPLY_ERROR_IN => (others => '0'),
+
+ -- Internal direction port
+
+ INT_INIT_DATAREADY_OUT => buf_to_apl_INIT_DATAREADY,
+ INT_INIT_DATA_OUT => buf_to_apl_INIT_DATA,
+ INT_INIT_READ_IN => buf_to_apl_INIT_READ,
+
+ INT_INIT_DATAREADY_IN => apl_to_buf_INIT_DATAREADY,
+ INT_INIT_DATA_IN => apl_to_buf_INIT_DATA,
+ INT_INIT_READ_OUT => apl_to_buf_INIT_READ,
+
+ INT_REPLY_HEADER_IN => '0',
+ INT_REPLY_DATAREADY_OUT => buf_to_apl_REPLY_DATAREADY,
+ INT_REPLY_DATA_OUT => buf_to_apl_REPLY_DATA,
+ INT_REPLY_READ_IN => buf_to_apl_REPLY_READ,
+
+ INT_REPLY_DATAREADY_IN => apl_to_buf_REPLY_DATAREADY,
+ INT_REPLY_DATA_IN => apl_to_buf_REPLY_DATA,
+ INT_REPLY_READ_OUT => apl_to_buf_REPLY_READ,
+
+ -- Status and control port
+ STAT_GEN => STAT_GEN,
+ STAT_LOCKED => STAT_LOCKED,
+ STAT_INIT_BUFFER => STAT_INIT_BUFFER,
+ STAT_REPLY_BUFFER => STAT_REPLY_BUFFER,
+ CTRL_GEN => CTRL_GEN,
+ CTRL_LOCKED => CTRL_LOCKED,
+ STAT_CTRL_INIT_BUFFER => STAT_CTRL_INIT_BUFFER,
+ STAT_CTRL_REPLY_BUFFER => STAT_CTRL_REPLY_BUFFER
+ );
+
+ MPLEX: trb_net_io_multiplexer
+ generic map (BUS_WIDTH => 52,
+ MULT_WIDTH => 1)
+ port map (
+ CLK => CLK,
+ RESET => RESET ,
+ CLK_EN => CLK_EN,
+
+ MED_DATAREADY_IN => MED_DATAREADY_IN,
+ MED_DATA_IN => MED_DATA_IN,
+ MED_READ_OUT => MED_READ_OUT,
+
+ MED_DATAREADY_OUT => MED_DATAREADY_OUT,
+ MED_DATA_OUT => MED_DATA_OUT,
+ MED_READ_IN => MED_READ_IN,
+
+ INT_DATAREADY_OUT => m_DATAREADY_IN,
+ INT_DATA_OUT =>m_DATA_IN,
+ INT_READ_IN =>m_READ_OUT,
+
+ INT_DATAREADY_IN =>m_DATAREADY_OUT,
+ INT_DATA_IN =>m_DATA_OUT,
+ INT_READ_OUT =>m_READ_IN,
+
+ CTRL => MPLEX_CTRL
+
+ );
+
+end trb_net_active_apimbuf_arch;
+
jspc29 / trbnet.git / commitdiff