begin
if (CLEAR = '1') then
fifo_rx_wr_en(i) <= '0';
+ fifo_rx_din(i*18+17 downto i*18) <= (others => '0');
+ last_rx(9*i+8 downto 9*i) <= (others => '0');
elsif( rising_edge(SYSCLK) ) then
last_rx(9*i+8 downto 9*i) <= rx_k(i*2+1) & rx_data(i*16+15 downto i*16+8);
if( swap_bytes_qrx(i) = '0' ) then
LOCATE COMP "SPI_CLK_OUT" SITE "G15"; # L1_SPI_F1CLK
LOCATE COMP "SPI_CS_OUT" SITE "J16"; # L1_SPI_F1CS
- LOCATE COMP "SPI_SO_IN" SITE "C16"; # L1_SPI_F1IN
- LOCATE COMP "SPI_SI_OUT" SITE "D16"; # L1_SPI_F1OUT
+ LOCATE COMP "SPI_SO_IN" SITE "D16"; # L1_SPI_F1OUT
+ LOCATE COMP "SPI_SI_OUT" SITE "C16"; # L1_SPI_F1IN
DEFINE PORT GROUP "spi_group" "SPI_*" ;
IOBUF GROUP "spi_group" IO_TYPE=LVTTL33 PULLMODE=DOWN ;
LOCATE COMP "SPI_CLK_OUT" SITE "G22"; # L2_SPI_F2CLK
LOCATE COMP "SPI_CS_OUT" SITE "E23"; # L2_SPI_F2CS
- LOCATE COMP "SPI_SO_IN" SITE "D22"; # L2_SPI_F2IN
- LOCATE COMP "SPI_SI_OUT" SITE "F21"; # L2_SPI_F2OUT
+ LOCATE COMP "SPI_SO_IN" SITE "F21"; # L2_SPI_F2OUT
+ LOCATE COMP "SPI_SI_OUT" SITE "D22"; # L2_SPI_F2IN
DEFINE PORT GROUP "spi_group" "SPI_*" ;
IOBUF GROUP "spi_group" IO_TYPE=LVTTL33 PULLMODE=DOWN ;
LOCATE COMP "TRBNET_MOD_1" SITE "E23";
LOCATE COMP "TRBNET_MOD_2" SITE "G22";
# LOCATE COMP "TRB_RATE_SEL" SITE "D22";
- LOCATE COMP "TRBNET_TX_DIS" SITE "E21";
+ LOCATE COMP "TRBNET_TXDIS" SITE "E21";
# LOCATE COMP "TRB_TX_FAULT" SITE "D23";
- LOCATE COMP "TRBNET_OK" SITE "F21";
- LOCATE COMP "TRBNET_RX" SITE "G18";
- LOCATE COMP "TRBNET_TX" SITE "H18";
+ LOCATE COMP "TRBNET_OK" SITE "G16";
+ LOCATE COMP "TRBNET_RX" SITE "H16";
+ LOCATE COMP "TRBNET_TX" SITE "F16";
+
DEFINE PORT GROUP "trb__group" "TRBNET_*" ;
IOBUF GROUP "trb__group" IO_TYPE=LVTTL33 PULLMODE=UP ;
LOCATE COMP "GBE_MOD_1" SITE "A16";
LOCATE COMP "GBE_MOD_2" SITE "B16";
# LOCATE COMP "GBE_RATE_SEL" SITE "G17";
- LOCATE COMP "GBE_TX_DIS" SITE "C17";
+ LOCATE COMP "GBE_TXDIS" SITE "C17";
# LOCATE COMP "GBE_TX_FAULT" SITE "D18";
+ LOCATE COMP "GBE_OK" SITE "F21";
+ LOCATE COMP "GBE_RX" SITE "G18";
+ LOCATE COMP "GBE_TX" SITE "H18";
+
- LOCATE COMP "GBE_OK" SITE "G16";
- LOCATE COMP "GBE_RX" SITE "H16";
- LOCATE COMP "GBE_TX" SITE "F16";
DEFINE PORT GROUP "gbe_group" "G_*" ;
IOBUF GROUP "gbe_group" IO_TYPE=LVTTL33 PULLMODE=UP ;
LOCATE COMP "SPI_CLK_OUT" SITE "E20"; # L3_SPI_F3CLK
LOCATE COMP "SPI_CS_OUT" SITE "D21"; # L3_SPI_F3CS
- LOCATE COMP "SPI_SO_IN" SITE "E19"; # L3_SPI_F3IN
- LOCATE COMP "SPI_SI_OUT" SITE "D19"; # L3_SPI_F3OUT
+ LOCATE COMP "SPI_SO_IN" SITE "D19"; # L3_SPI_F3OUT
+ LOCATE COMP "SPI_SI_OUT" SITE "E19"; # L3_SPI_F3IN
DEFINE PORT GROUP "spi_group" "SPI_*" ;
- IOBUF GROUP "spi_group" IO_TYPE=LVTTL33 PULLMODE=DOWN ;
+ IOBUF GROUP "spi_group" IO_TYPE=LVTTL33 PULLMODE=UP ;
#####################################################################
architecture trb_net16_api_ipu_streaming_arch of trb_net16_api_ipu_streaming is
attribute syn_hier : string;
- attribute syn_hier of trb_net16_iobuf_arch : architecture is "firm";
+ attribute syn_hier of trb_net16_api_ipu_streaming_arch : architecture is "firm";
signal APL_CTS_TARGET_ADDRESS : std_logic_vector(15 downto 0) := x"FFFF";
signal APL_CTS_DATA_OUT : std_logic_vector(15 downto 0);
cts_start_readout_rising <= buf_CTS_START_READOUT_OUT and not last_buf_CTS_START_READOUT_OUT;
end if;
end process;
- APL_FEE_SEND_IN <= cts_start_readout_rising;
+ APL_FEE_SEND_IN <= cts_start_readout_rising;
- APL_FEE_READ_IN <= '1' when FEE_READ_IN = '1' or (APL_FEE_TYP_OUT /= TYPE_DAT) or end_of_data_reached = '1' else '0';
- buf_FEE_DATAREADY_OUT <= APL_FEE_DATAREADY_OUT when APL_FEE_TYP_OUT = TYPE_DAT and end_of_data_reached = '0' else '0';
- FEE_DATA_OUT <= APL_FEE_DATA_OUT;
- FEE_BUSY_OUT <= APL_FEE_RUN_OUT;
+ APL_FEE_READ_IN <= '1' when FEE_READ_IN = '1' or (APL_FEE_TYP_OUT /= TYPE_DAT) or end_of_data_reached = '1' else '0';
+ buf_FEE_DATAREADY_OUT <= APL_FEE_DATAREADY_OUT when APL_FEE_TYP_OUT = TYPE_DAT and end_of_data_reached = '0' else '0';
+ FEE_DATA_OUT <= APL_FEE_DATA_OUT;
+ FEE_BUSY_OUT <= APL_FEE_RUN_OUT;
APL_FEE_ERROR_PATTERN_IN(15 downto 0) <= buf_CTS_NUMBER_OUT;
APL_FEE_ERROR_PATTERN_IN(23 downto 16) <= buf_CTS_CODE_OUT;
APL_FEE_DTYPE_IN <= buf_CTS_READOUT_TYPE_OUT;
FEE_DATAREADY_OUT <= buf_FEE_DATAREADY_OUT;
- CTS_NUMBER_OUT <= buf_CTS_NUMBER_OUT;
- CTS_INFORMATION_OUT <= buf_CTS_INFORMATION_OUT;
- CTS_READOUT_TYPE_OUT <= buf_CTS_READOUT_TYPE_OUT;
- CTS_CODE_OUT <= buf_CTS_CODE_OUT;
- CTS_START_READOUT_OUT <= buf_CTS_START_READOUT_OUT;
+ CTS_NUMBER_OUT <= buf_CTS_NUMBER_OUT;
+ CTS_INFORMATION_OUT <= buf_CTS_INFORMATION_OUT;
+ CTS_READOUT_TYPE_OUT <= buf_CTS_READOUT_TYPE_OUT;
+ CTS_CODE_OUT <= buf_CTS_CODE_OUT;
+ CTS_START_READOUT_OUT <= buf_CTS_START_READOUT_OUT;
---------------------------------------------------------------------
-- Find end of data
---------------------------------------------------------------------
--debug Status and Control ports
- buf_STAT_DEBUG(4 downto 0) <= HUB_INIT_DATAREADY_IN(15 downto 11);
- buf_STAT_DEBUG(9 downto 5) <= HUB_INIT_READ_OUT(15 downto 11);
- buf_STAT_DEBUG(14 downto 10) <= HUB_REPLY_READ_OUT(15 downto 11);
- buf_STAT_DEBUG(19 downto 15) <= HUB_INIT_DATAREADY_OUT(15 downto 11);
- buf_STAT_DEBUG(24 downto 20) <= HUB_INIT_READ_IN(15 downto 11);
- buf_STAT_DEBUG(27 downto 25) <= CTRL_DEBUG(2 downto 0);
- buf_STAT_DEBUG(28) <= stream_port_connected;
- buf_STAT_DEBUG(30 downto 29) <= "00";
- buf_STAT_DEBUG(31) <= CLK;
+-- buf_STAT_DEBUG(4 downto 0) <= HUB_INIT_DATAREADY_IN(15 downto 11);
+-- buf_STAT_DEBUG(9 downto 5) <= HUB_INIT_READ_OUT(15 downto 11);
+-- buf_STAT_DEBUG(14 downto 10) <= HUB_REPLY_READ_OUT(15 downto 11);
+-- buf_STAT_DEBUG(19 downto 15) <= HUB_INIT_DATAREADY_OUT(15 downto 11);
+-- buf_STAT_DEBUG(24 downto 20) <= HUB_INIT_READ_IN(15 downto 11);
+-- buf_STAT_DEBUG(27 downto 25) <= CTRL_DEBUG(2 downto 0);
+-- buf_STAT_DEBUG(28) <= stream_port_connected;
+-- buf_STAT_DEBUG(30 downto 29) <= "00";
+-- buf_STAT_DEBUG(31) <= CLK;
+ buf_STAT_DEBUG(31 downto 0) <= (others => '0');
-- buf_STAT_DEBUG(18 downto 16) <= IOBUF_IBUF_BUFFER(20+32*6 downto 18+32*6);
-- buf_STAT_DEBUG(21 downto 19) <= IOBUF_IBUF_BUFFER(20+32*7 downto 18+32*7);