small fix for the filling of the end of data with 0xAAAA. Minor fixes in simulation...

diff --git a/src/cri_data_sender.vhd b/src/cri_data_sender.vhd
index 7113331b88f3488e57309c459ae8f9286cf91f15..1897a150f6939871fb77e3a226da39964f731aaf 100644 (file)
--- a/src/cri_data_sender.vhd
+++ b/src/cri_data_sender.vhd
@@ -702,9 +702,12 @@ begin
     
        
   -- Data to CRI board 
-  API_DATA_OUT       <= cri_apl_data_2api;
-  API_PACKET_NUM_OUT <= cri_apl_packet_num_2api;
-  API_DATAREADY_OUT  <= cri_apl_dataready_2api;
+  API_DATA_OUT       <= cri_apl_data_2api when ((send_state_current = LOAD) or (send_state_current = FINISH_CALIB))
+                        else cri_apl_data;
+  API_PACKET_NUM_OUT <= cri_apl_packet_num_2api when ((send_state_current = LOAD) or (send_state_current = FINISH_CALIB))
+                        else cri_apl_packet_num;
+  API_DATAREADY_OUT  <= cri_apl_dataready_2api when ((send_state_current = LOAD) or (send_state_current = FINISH_CALIB))
+                        else cri_apl_dataready;
   cri_apl_reading    <= API_READ_IN;
   
   API_SHORT_TRANSFER_OUT  <= '0';

diff --git a/src/testbench/dataSender_tb.vhd b/src/testbench/dataSender_tb.vhd
index 765666dd5b9513716f35ead21d4860ebbf119ce5..fb5e7e1dcbe26fbe79c35df4642dd4ad13d73319 100644 (file)
--- a/src/testbench/dataSender_tb.vhd
+++ b/src/testbench/dataSender_tb.vhd
@@ -20,6 +20,7 @@ signal CLK, CLK_inv,RESET : std_logic := '0';
 signal data_in, data_out : std_logic_vector(15 downto 0);
 signal cal_active, dready_in, dready_out, eod_in, eod_out : std_logic;
 signal pack_num_in, pack_num_out : std_logic_vector(2 downto 0);
+signal fee_busy_in : std_logic;
 
 constant CLK_PERIOD : time := 10 ns;
 
@@ -73,7 +74,7 @@ begin
         FEE_DATA_IN              => data_in,
         FEE_DATAREADY_IN         => dready_in,
         FEE_READ_OUT             => open,
-        FEE_BUSY_IN              => '1',
+        FEE_BUSY_IN              => fee_busy_in,
         FEE_STATUS_BITS_IN       => (others => '0'),
         
         BUS_CALIBRATON_RX        => BUS_RX,
@@ -105,6 +106,7 @@ begin
       cal_active <= '1';
       data_in    <= x"1234";
       eod_in     <= '0';
+      fee_busy_in <= '1';
       wait for 20 ns;
       data_in     <= x"1234";
       pack_num_in <= "000";
@@ -162,6 +164,16 @@ begin
       data_in     <= x"9600";
       pack_num_in <= "001";
       dready_in   <= '1';
+     
+     -- wait for 10 ns;
+     -- data_in     <= x"6000";
+     -- pack_num_in <= "010";
+     -- dready_in   <= '1';
+     -- wait for 10 ns;
+     -- data_in     <= x"0789";
+     -- pack_num_in <= "011";
+     -- dready_in   <= '1';
+
       wait for 10 ns;
       data_in     <= x"0000";
       pack_num_in <= "010";
@@ -171,7 +183,7 @@ begin
       pack_num_in <= "011";
       dready_in   <= '1';
       wait for 10 ns;
-      data_in     <= x"0002";
+      data_in     <= x"0001";
       pack_num_in <= "000";
       dready_in   <= '1';
       wait for 10 ns;
@@ -187,25 +199,8 @@ begin
       pack_num_in <= "011";
       dready_in   <= '1';
       wait for 10 ns;
-      data_in     <= x"0001";
-      pack_num_in <= "000";
-      dready_in   <= '1';
-      wait for 10 ns;
-      data_in     <= x"5555";
-      pack_num_in <= "001";
-      dready_in   <= '1';
-      wait for 10 ns;
-      data_in     <= x"0000";
-      pack_num_in <= "010";
-      dready_in   <= '1';
-      wait for 10 ns;
-      data_in     <= x"0001";
-      eod_in      <= '1';
-      pack_num_in <= "011";
-      dready_in   <= '1';
-      wait for 10 ns;
       data_in     <= x"0000";
-      eod_in      <= '0';
+      fee_busy_in <= '0';
 --      pack_num_in <= "010";
       dready_in   <= '0';
       cal_active  <= '0';