-# Plane # Sector # inner short # outer short # inner long # outer long #
-###############################################################################################################
- 0 0 0 0 ce000001f1108e28 0
- 0 1 22000001f1438f28 54000001f130e628 54000001f130e628 81000001f1496e28
- 0 2 0 0 0 0
- 0 3 df000001f1508528 1f000001f1449e28 68000001f1438228 2d000001f1299428
- 0 4 3b000001f159ad28 21000001f110ad28 1c0000028f6efa28 e4000001f12a8028
- 0 5 3f000001f10c6928 1e000001f12efc28 0 53000001f122ed28
+# Plane # Sector # inner short # outer short # inner long # outer long # inner center #
+#####################################################################################################################################
+ 0 0 A3000001f1408528 1F000001f14F7D28 B7000001f110A428 78000001F149E028 A2000001F1194E28
+ 0 1 22000001f1438f28 54000001f130e628 7e000001f12f9e28 81000001f1496e28 72000001F10CD428
+ 0 2 96000001f1132328 a6000001f14adc28 55000001f141EE28 AD000001F12B0228 0D000001F10B8428
+ 0 3 df000001f1508528 1f000001f1449e28 68000001f1438228 2d000001f1299428 94000001F1CF2628
+ 0 4 3b000001f159ad28 21000001f110ad28 1c0000028f6efa28 e4000001f12a8028 D4000001F12B2828
+ 0 5 3f000001f10c6928 1e000001f12efc28 ce000001f1108e28 53000001f122ed28 66000001F140D028
- 1 0 5c000001f111b828 0 0 0
- 1 1 4d000001f14ebd28 0 d4000001f12b2828 0a0000028f9a8b28
- 1 2 0 0 d1000001f116bc28 df000001f128d928
- 1 3 fb000001f129cf28 0 d4000001f1291a28 0
- 1 4 0f000001f12b9c28 0 70000001f1217928 b2000001f1284d28
- 1 5 0 0 0c000001f14e6a28 a40000028f6ac728
+ 1 0 5c000001f111b828 0 46000001F1325F28 3A000001F13F6328 70000001f14cd128
+ 1 1 4d000001f14ebd28 0 d4000001f12b2828 0a0000028f9a8b28 87000001f12C3B28
+ 1 2 42000001f1188828 0 d1000001f116bc28 df000001f128d928 E3000001f1278528
+ 1 3 fb000001f129cf28 0 F6000001F1162528 00000001F1485628 C2000001f1424928
+ 1 4 0f000001f12b9c28 0 70000001f1217928 b2000001f1284d28 D5000001f13C6B28
+ 1 5 0 0 0c000001f14e6a28 a40000028f6ac728 18000001f10BBF28
2 0 0 0 0 0
2 1 0 0 0 0
2 2 0 0 0 0
- 2 3 0 0 0 0
+ 2 3 5C000001F116F728 0 0 0
2 4 0 0 0 0
2 5 0 0 0 0
use HADES::TrbNet;
use Time::HiRes qw(usleep);
use Data::Dumper;
+use POSIX qw/strftime/;
trb_init_ports() or die trb_strerror();
-i2c_cmd(0xfe90,0x30,0xd2,0xe1);
-usleep(1000);
+my $boards;
-i2c_cmd(0xfe90,0x30,,0xb4);
-usleep(2000);
-i2c_cmd(0xfe90,0x30,0xa5,0xcc);
-usleep(2000);
-i2c_cmd(0xfe90,0x30,0xa5,0x44);
-usleep(2000);
+trb_register_write(0xfe90,0xd680,25); #not 400kHz speed
+#Configure I2C chips
+i2c_cmd(0xfe90,0x30,0xd2,0xe1);
+usleep(1000);
-sleep(1);
+#Detect I2C buses
+my $res = trb_register_read(0xfe90,0xd684);
+foreach my $b (keys %$res) {
+ if (($res->{$b}&0xff0000) == 0) {
+ $boards->{$b}=();
+ }
+ }
-i2c_cmd(0xfe90,0x30,,0xb4);
-usleep(2000);
+#print Dumper $res;
+#exit;
+#Loop through buses and find sensors
+foreach my $b (sort keys %$boards) {
+ searchROM($b);
+ }
-i2c_cmd(0xfe90,0x30,0xa5,0xcc);
-usleep(2000);
-i2c_cmd(0xfe90,0x30,0xa5,0xbe);
-usleep(2000);
+while(1) {
+ print strftime("%Y-%m-%d %H:%M:%S\n",localtime);
+ #Send broadcast conversion command
+ i2c_cmd(0xfe90,0x30,,0xb4);
+ usleep(2000);
+ i2c_cmd(0xfe90,0x30,0xa5,0xcc);
+ usleep(2000);
+ i2c_cmd(0xfe90,0x30,0xa5,0x44);
+ sleep(1);
+
+ #Loop through buses and read data
+ foreach my $b (sort keys %$boards) {
+ readData($b);
+ }
+ last;
+ sleep 10;
+ }
-i2c_cmd(0xfe90,0x30,0x96);
-usleep(2000);
-i2c_cmd(0xfe90,0x30,0xe1,0xe1);
-usleep(2000);
-my $ret1 = i2c_cmd(0xfe90,0x30,0xe1);
-i2c_cmd(0xfe90,0x30,0x96);
-usleep(2000);
-i2c_cmd(0xfe90,0x30,0xe1,0xe1);
-usleep(2000);
-my $ret2 = i2c_cmd(0xfe90,0x30,0xe1);
-foreach my $f (keys %$ret1) {
- next if ($ret1->{$f} == 0xff && $ret2->{$f} == 0xff);
- printf("%04x\t%2.1f\n",$f,($ret1->{$f}+($ret2->{$f} << 8))/2);
+sub searchROM {
+ my($board) = @_;
+ my $LastDiscrepancy = -1;
+ my $LastZero = -1;
+ my $currentROM = 0;
+ my $lastROM = 0;
+ my $direction = 0;
+# printf("%04x\n",$board);
+ while(1) {
+ $currentROM = 0;
+ $LastZero = -1;
+ #reset, search ROM
+ i2c_cmd($board,0x30,,0xb4);
+ usleep(2000);
+ i2c_cmd($board,0x30,0xa5,0xf0);
+ usleep(2000);
+
+ for my $i (0..63) {
+ $direction = 0 if $i > $LastDiscrepancy;
+ $direction = 1 if $i == $LastDiscrepancy;
+ $direction = ($lastROM>>$i)&1 if $i < $LastDiscrepancy;
+
+ i2c_cmd($board,0x30,0x78,$direction << 7);
+ usleep(2000);
+ my $ret2 = i2c_cmd(0xfe90,0x30,0xe1);
+ my $idbit = ($ret2->{$board}&0x20)?1:0;
+ my $notidbit = ($ret2->{$board}&0x40)?1:0;
+ my $realdir = ($ret2->{$board}&0x80)?1:0;
+ return if $idbit && $notidbit;
+ $LastZero = $i if ($realdir == 0 && $idbit == 0 && $notidbit == 0);
+ $currentROM |= ($realdir << $i);
+ }
+# printf("%08x %i %i\n",$currentROM,$LastZero,$LastDiscrepancy);
+ $LastDiscrepancy = $LastZero;
+ $boards->{$board}{$currentROM}=0;
+ $lastROM = $currentROM;
+ last if $LastDiscrepancy == -1;
+ }
+
+ return;
}
-
+sub readData {
+ my($board) = @_;
+ foreach my $uid (sort keys %{$boards->{$board}}) {
+ i2c_cmd($board,0x30,,0xb4);
+ usleep(2000);
+ i2c_cmd($board,0x30,0xa5,0x55);
+ usleep(2000);
+
+ for my $i (0..7) {
+ i2c_cmd($board,0x30,0xa5,($uid>>8*$i)&0xff);
+ usleep(2000);
+ }
+ i2c_cmd($board,0x30,0xa5,0xbe);
+ usleep(2000);
+
+ i2c_cmd($board,0x30,0x96);
+ usleep(2000);
+ i2c_cmd($board,0x30,0xe1,0xe1);
+ usleep(2000);
+ my $ret1 = i2c_cmd($board,0x30,0xe1);
+ i2c_cmd($board,0x30,0x96);
+ usleep(2000);
+ i2c_cmd($board,0x30,0xe1,0xe1);
+ usleep(2000);
+ my $ret2 = i2c_cmd($board,0x30,0xe1);
+ usleep(2000);
+
+ my $temp = ($ret1->{$board}+($ret2->{$board} << 8));
+ printf("%04x\t%016x\t---\n",$board,$uid) and next if $temp == 0xffff;
+ $temp /= 16;
+ printf("%04x\t%016x\t%2.2f\n",$board,$uid,$temp);
+ $boards->{$board}{$uid} = $temp;
+ }
+ }
+
+
+
+
sub i2c_cmd {
my ($fpga,$addr,$cmd,$byte1,$byte2) = @_;
if(defined($byte1)) {
trb_register_write_mem($fpga,0xd681,0,[$reg_flag,$reg_data],2);
+ usleep(2000);
+ $reg_return = trb_register_read($fpga,0xd684);
+ my $error = ($reg_return->{$fpga} >> 16) & 0xdf;
+ print STDERR $error."\n" if $error;
+ printf("E: %x %x %x %x %x\n",$fpga,$addr,$cmd,$byte1,$byte2) and die if $error == 0x80;
}
else {
$reg_flag |= 0x100;
trb_register_write_mem($fpga,0xd681,0,[$reg_flag,$reg_data],2);
- usleep(1000);
+ usleep(2000);
$reg_return = trb_register_read($fpga,0xd684);
-
+ my $error = ($reg_return->{$fpga} >> 16) & 0xdf;
+ print STDERR $error."\n" if $error;
+ printf("E: %x %x %x %x %x\n",$fpga,$addr,$cmd,$byte1,$byte2) and die if $error == 0x80;
my $ret;
foreach my $f (keys %$reg_return) {
$ret->{$f} = $reg_return->{$f}&($word?0xffff:0xff);
jspc29 / hades_mdc_settings.git / commitdiff